Check PCI IDs for scanning SMBus devices to speed up detection
This commit is contained in:
parent
2d53a2c7f1
commit
29fea380aa
12 changed files with 316 additions and 289 deletions
|
|
@ -3,6 +3,7 @@
|
|||
#include "RGBController.h"
|
||||
#include "RGBController_AuraSMBus.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
|
@ -130,61 +131,69 @@ void DetectAuraSMBusControllers(std::vector<i2c_smbus_interface*> &busses, std::
|
|||
{
|
||||
int address_list_idx = -1;
|
||||
|
||||
// Remap Aura-enabled RAM modules on 0x77
|
||||
for (unsigned int slot = 0; slot < 8; slot++)
|
||||
IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
|
||||
{
|
||||
int res = busses[bus]->i2c_smbus_write_quick(0x77, I2C_SMBUS_WRITE);
|
||||
|
||||
if (res < 0)
|
||||
// Remap Aura-enabled RAM modules on 0x77
|
||||
for (unsigned int slot = 0; slot < 8; slot++)
|
||||
{
|
||||
break;
|
||||
}
|
||||
int res = busses[bus]->i2c_smbus_write_quick(0x77, I2C_SMBUS_WRITE);
|
||||
|
||||
do
|
||||
{
|
||||
address_list_idx++;
|
||||
|
||||
if(address_list_idx < AURA_RAM_ADDRESS_COUNT)
|
||||
{
|
||||
res = busses[bus]->i2c_smbus_write_quick(aura_ram_addresses[address_list_idx], I2C_SMBUS_WRITE);
|
||||
}
|
||||
else
|
||||
if (res < 0)
|
||||
{
|
||||
break;
|
||||
}
|
||||
} while (res >= 0);
|
||||
|
||||
if(address_list_idx < AURA_RAM_ADDRESS_COUNT)
|
||||
{
|
||||
AuraRegisterWrite(busses[bus], 0x77, AURA_REG_SLOT_INDEX, slot);
|
||||
AuraRegisterWrite(busses[bus], 0x77, AURA_REG_I2C_ADDRESS, (aura_ram_addresses[address_list_idx] << 1));
|
||||
}
|
||||
}
|
||||
do
|
||||
{
|
||||
address_list_idx++;
|
||||
|
||||
// Add Aura-enabled controllers at their remapped addresses
|
||||
for (unsigned int address_list_idx = 0; address_list_idx < AURA_RAM_ADDRESS_COUNT; address_list_idx++)
|
||||
{
|
||||
if (TestForAuraSMBusController(busses[bus], aura_ram_addresses[address_list_idx]))
|
||||
{
|
||||
new_aura = new AuraSMBusController(busses[bus], aura_ram_addresses[address_list_idx]);
|
||||
new_controller = new RGBController_AuraSMBus(new_aura);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
if(address_list_idx < AURA_RAM_ADDRESS_COUNT)
|
||||
{
|
||||
res = busses[bus]->i2c_smbus_write_quick(aura_ram_addresses[address_list_idx], I2C_SMBUS_WRITE);
|
||||
}
|
||||
else
|
||||
{
|
||||
break;
|
||||
}
|
||||
} while (res >= 0);
|
||||
|
||||
if(address_list_idx < AURA_RAM_ADDRESS_COUNT)
|
||||
{
|
||||
AuraRegisterWrite(busses[bus], 0x77, AURA_REG_SLOT_INDEX, slot);
|
||||
AuraRegisterWrite(busses[bus], 0x77, AURA_REG_I2C_ADDRESS, (aura_ram_addresses[address_list_idx] << 1));
|
||||
}
|
||||
}
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
// Add Aura-enabled controllers at their remapped addresses
|
||||
for (unsigned int address_list_idx = 0; address_list_idx < AURA_RAM_ADDRESS_COUNT; address_list_idx++)
|
||||
{
|
||||
if (TestForAuraSMBusController(busses[bus], aura_ram_addresses[address_list_idx]))
|
||||
{
|
||||
new_aura = new AuraSMBusController(busses[bus], aura_ram_addresses[address_list_idx]);
|
||||
new_controller = new RGBController_AuraSMBus(new_aura);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
}
|
||||
}
|
||||
|
||||
// Add Aura-enabled motherboard controllers
|
||||
for (unsigned int address_list_idx = 0; address_list_idx < AURA_MOBO_ADDRESS_COUNT; address_list_idx++)
|
||||
if(busses[bus]->pci_vendor == AMD_VEN &&
|
||||
busses[bus]->pci_device == AMD_FCH_SMBUS_DEV &&
|
||||
busses[bus]->pci_subsystem_vendor == ASUS_SUB_VEN)
|
||||
{
|
||||
if (TestForAuraSMBusController(busses[bus], aura_mobo_addresses[address_list_idx]))
|
||||
for (unsigned int address_list_idx = 0; address_list_idx < AURA_MOBO_ADDRESS_COUNT; address_list_idx++)
|
||||
{
|
||||
new_aura = new AuraSMBusController(busses[bus], aura_mobo_addresses[address_list_idx]);
|
||||
new_controller = new RGBController_AuraSMBus(new_aura);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
if (TestForAuraSMBusController(busses[bus], aura_mobo_addresses[address_list_idx]))
|
||||
{
|
||||
new_aura = new AuraSMBusController(busses[bus], aura_mobo_addresses[address_list_idx]);
|
||||
new_controller = new RGBController_AuraSMBus(new_aura);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
std::this_thread::sleep_for(1ms);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
#include "RGBController.h"
|
||||
#include "RGBController_CorsairVengeance.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
|
@ -58,68 +59,71 @@ void DetectCorsairVengeanceControllers(std::vector<i2c_smbus_interface*> &busses
|
|||
|
||||
for (unsigned int bus = 0; bus < busses.size(); bus++)
|
||||
{
|
||||
// Check for Corsair controller at 0x58
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x58))
|
||||
IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x58);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x58
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x58))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x58);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x59
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x59))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x59);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x59
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x59))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x59);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5A
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5A))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5A);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5A
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5A))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5A);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5B
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5B))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5B);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5B
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5B))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5B);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5C
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5C))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5C);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5C
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5C))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5C);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5D
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5D))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5D);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5D
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5D))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5D);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5E
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5E))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5E);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5E
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5E))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5E);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5F
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5F))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5F);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
// Check for Corsair controller at 0x5F
|
||||
if (TestForCorsairVengeanceController(busses[bus], 0x5F))
|
||||
{
|
||||
new_corsair = new CorsairVengeanceController(busses[bus], 0x5F);
|
||||
new_controller = new RGBController_CorsairVengeance(new_corsair);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
#include "RGBController.h"
|
||||
#include "RGBController_CorsairVengeancePro.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
|
@ -66,68 +67,71 @@ void DetectCorsairVengeanceProControllers(std::vector<i2c_smbus_interface*> &bus
|
|||
|
||||
for (unsigned int bus = 0; bus < busses.size(); bus++)
|
||||
{
|
||||
// Check for Corsair controller at 0x58
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x58))
|
||||
IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x58);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x58
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x58))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x58);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x59
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x59))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x59);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x59
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x59))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x59);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5A
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5A))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5A);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5A
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5A))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5A);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5B
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5B))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5B);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5B
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5B))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5B);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5C
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5C))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5C);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5C
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5C))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5C);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5D
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5D))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5D);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5D
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5D))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5D);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5E
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5E))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5E);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
// Check for Corsair controller at 0x5E
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5E))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5E);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
|
||||
// Check for Corsair controller at 0x5F
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5F))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5F);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
// Check for Corsair controller at 0x5F
|
||||
if (TestForCorsairVengeanceProController(busses[bus], 0x5F))
|
||||
{
|
||||
new_corsair_pro = new CorsairVengeanceProController(busses[bus], 0x5F);
|
||||
new_controller = new RGBController_CorsairVengeancePro(new_corsair_pro);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
#include "RGBController.h"
|
||||
#include "RGBController_Crucial.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
|
@ -74,14 +75,17 @@ void DetectCrucialControllers(std::vector<i2c_smbus_interface*> &busses, std::ve
|
|||
|
||||
for (unsigned int bus = 0; bus < busses.size(); bus++)
|
||||
{
|
||||
// Add Crucial controllers
|
||||
for (unsigned int address_list_idx = 0; address_list_idx < CRUCIAL_ADDRESS_COUNT; address_list_idx++)
|
||||
IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
|
||||
{
|
||||
if (TestForCrucialController(busses[bus], crucial_addresses[address_list_idx]))
|
||||
// Add Crucial controllers
|
||||
for (unsigned int address_list_idx = 0; address_list_idx < CRUCIAL_ADDRESS_COUNT; address_list_idx++)
|
||||
{
|
||||
new_crucial = new CrucialController(busses[bus], crucial_addresses[address_list_idx]);
|
||||
new_controller = new RGBController_Crucial(new_crucial);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
if (TestForCrucialController(busses[bus], crucial_addresses[address_list_idx]))
|
||||
{
|
||||
new_crucial = new CrucialController(busses[bus], crucial_addresses[address_list_idx]);
|
||||
new_controller = new RGBController_Crucial(new_crucial);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5,32 +5,11 @@
|
|||
#include "RGBController_EVGAGPUv1.h"
|
||||
#include "RGBController_EVGAGPUv2.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| NVidia vendor ID |
|
||||
\*-----------------------------------------------------*/
|
||||
#define NVIDIA_VEN 0x10DE
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| NVidia device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define NVIDIA_GTX1070_DEV 0x1B81
|
||||
#define NVIDIA_RTX2080_DEV 0x1E87
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| EVGA sub-vendor ID |
|
||||
\*-----------------------------------------------------*/
|
||||
#define EVGA_SUB_VEN 0x3842
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| EVGA sub-device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define EVGA_GTX1070_FTW_SUB_DEV 0x6276
|
||||
#define EVGA_RTX2080_XC_GAMING_SUB_DEV 0x2182
|
||||
|
||||
enum
|
||||
{
|
||||
EVGA_RGB_V1,
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
#include "RGBController.h"
|
||||
#include "RGBController_HyperXDRAM.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
|
@ -63,32 +64,35 @@ void DetectHyperXDRAMControllers(std::vector<i2c_smbus_interface*> &busses, std:
|
|||
{
|
||||
unsigned char slots_valid = 0x00;
|
||||
|
||||
// Check for HyperX controller at 0x27
|
||||
if (TestForHyperXDRAMController(busses[bus], 0x27))
|
||||
IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
|
||||
{
|
||||
busses[bus]->i2c_smbus_write_byte_data(0x37, 0x00, 0xFF);
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
|
||||
for(int slot_addr = 0x50; slot_addr <= 0x57; slot_addr++)
|
||||
// Check for HyperX controller at 0x27
|
||||
if (TestForHyperXDRAMController(busses[bus], 0x27))
|
||||
{
|
||||
// Test for HyperX SPD at slot_addr
|
||||
// This test was copied from NGENUITY software
|
||||
// Tests SPD addresses in order: 0x40, 0x41
|
||||
if((busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x40) == 0x01)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x41) == 0x98))
|
||||
{
|
||||
slots_valid |= (1 << (slot_addr - 0x50));
|
||||
}
|
||||
busses[bus]->i2c_smbus_write_byte_data(0x37, 0x00, 0xFF);
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
}
|
||||
|
||||
for(int slot_addr = 0x50; slot_addr <= 0x57; slot_addr++)
|
||||
{
|
||||
// Test for HyperX SPD at slot_addr
|
||||
// This test was copied from NGENUITY software
|
||||
// Tests SPD addresses in order: 0x40, 0x41
|
||||
if((busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x40) == 0x01)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x41) == 0x98))
|
||||
{
|
||||
slots_valid |= (1 << (slot_addr - 0x50));
|
||||
}
|
||||
|
||||
if(slots_valid != 0)
|
||||
{
|
||||
new_hyperx = new HyperXDRAMController(busses[bus], 0x27, slots_valid);
|
||||
new_controller = new RGBController_HyperXDRAM(new_hyperx);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
std::this_thread::sleep_for(1ms);
|
||||
}
|
||||
|
||||
if(slots_valid != 0)
|
||||
{
|
||||
new_hyperx = new HyperXDRAMController(busses[bus], 0x27, slots_valid);
|
||||
new_controller = new RGBController_HyperXDRAM(new_hyperx);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -10,49 +10,11 @@
|
|||
#include "RGBController.h"
|
||||
#include "RGBController_MSIGPU.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| NVidia vendor ID |
|
||||
\*-----------------------------------------------------*/
|
||||
#define NVIDIA_VEN 0x10DE
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| NVidia device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define NVIDIA_GTX1070_DEV 0x1B81
|
||||
#define NVIDIA_RTX2060_DEV 0x1F08
|
||||
#define NVIDIA_RTX2060S_DEV 0x1F06
|
||||
#define NVIDIA_RTX2070_DEV 0x1F02
|
||||
#define NVIDIA_RTX2070S_DEV 0x1E84
|
||||
#define NVIDIA_RTX2080_DEV 0x1E87
|
||||
#define NVIDIA_RTX2080S_DEV 0x1E81
|
||||
#define NVIDIA_RTX2080TI_DEV 0x1E07
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| MSI sub-vendor ID |
|
||||
\*-----------------------------------------------------*/
|
||||
#define MSI_SUB_VEN 0x1462
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| MSI sub-device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define MSI_GTX1070_GAMING_X_SUB_DEV 0x3306
|
||||
#define MSI_RTX2060S_GAMING_X_SUB_DEV 0xC752
|
||||
#define MSI_RTX2070S_GAMING_X_SUB_DEV 0x373e
|
||||
#define MSI_RTX2070S_GAMING_X_TRIO_SUB_DEV 0xC726
|
||||
#define MSI_RTX2080_GAMING_X_TRIO_SUB_DEV 0x3726
|
||||
#define MSI_RTX2080S_GAMING_X_TRIO_SUB_DEV 0xC724
|
||||
#define MSI_RTX2080TI_GAMING_X_TRIO_SUB_DEV 0x3715
|
||||
#define MSI_RTX2060_GAMING_Z_6G_SUB_DEV 0x3754
|
||||
#define MSI_RTX2060_GAMING_Z_6G_SUB_DEV_2 0x3752
|
||||
#define MSI_RTX2070_ARMOR_SUB_DEV 0x3734
|
||||
#define MSI_RTX2060S_ARMOR_OC_SUB_DEV 0xC754
|
||||
#define MSI_RTX2080_SEA_HAWK_EK_X_SUB_DEV 0x3728
|
||||
#define MSI_RTX2080TI_SEA_HAWK_EK_X_SUB_DEV 0x3717
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int pci_vendor;
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
#include "RGBController.h"
|
||||
#include "RGBController_PatriotViper.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
|
@ -29,44 +30,47 @@ void DetectPatriotViperControllers(std::vector<i2c_smbus_interface*> &busses, st
|
|||
{
|
||||
unsigned char slots_valid = 0x00;
|
||||
|
||||
for(int slot_addr = 0x50; slot_addr <= 0x57; slot_addr++)
|
||||
IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
|
||||
{
|
||||
// Test for Patriot Viper RGB SPD at slot_addr
|
||||
// This test was copied from Viper RGB software
|
||||
// Tests SPD addresses in order: 0x00, 0x40, 0x41, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68
|
||||
busses[bus]->i2c_smbus_write_byte_data(0x36, 0x00, 0xFF);
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
|
||||
if(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x00) == 0x23)
|
||||
for(int slot_addr = 0x50; slot_addr <= 0x57; slot_addr++)
|
||||
{
|
||||
busses[bus]->i2c_smbus_write_byte_data(0x37, 0x00, 0xFF);
|
||||
// Test for Patriot Viper RGB SPD at slot_addr
|
||||
// This test was copied from Viper RGB software
|
||||
// Tests SPD addresses in order: 0x00, 0x40, 0x41, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68
|
||||
busses[bus]->i2c_smbus_write_byte_data(0x36, 0x00, 0xFF);
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
|
||||
if((busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x40) == 0x85)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x41) == 0x02)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x61) == 0x4D)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x62) == 0x49)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x63) == 0x43)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x64) == 0x53)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x65) == 0x59)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x66) == 0x53)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x67) == 0x5f)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x68) == 0x44))
|
||||
if(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x00) == 0x23)
|
||||
{
|
||||
slots_valid |= (1 << (slot_addr - 0x50));
|
||||
busses[bus]->i2c_smbus_write_byte_data(0x37, 0x00, 0xFF);
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
|
||||
if((busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x40) == 0x85)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x41) == 0x02)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x61) == 0x4D)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x62) == 0x49)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x63) == 0x43)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x64) == 0x53)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x65) == 0x59)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x66) == 0x53)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x67) == 0x5f)
|
||||
&&(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x68) == 0x44))
|
||||
{
|
||||
slots_valid |= (1 << (slot_addr - 0x50));
|
||||
}
|
||||
}
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
}
|
||||
|
||||
std::this_thread::sleep_for(1ms);
|
||||
}
|
||||
|
||||
if(slots_valid != 0)
|
||||
{
|
||||
new_viper = new PatriotViperController(busses[bus], 0x77, slots_valid);
|
||||
new_controller = new RGBController_PatriotViper(new_viper);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
if(slots_valid != 0)
|
||||
{
|
||||
new_viper = new PatriotViperController(busses[bus], 0x77, slots_valid);
|
||||
new_controller = new RGBController_PatriotViper(new_viper);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
#include "RGBController.h"
|
||||
#include "RGBController_RGBFusion2DRAM.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
|
@ -56,12 +57,15 @@ void DetectRGBFusion2DRAMControllers(std::vector<i2c_smbus_interface*>& busses,
|
|||
|
||||
for (unsigned int bus = 0; bus < busses.size(); bus++)
|
||||
{
|
||||
// Check for RGB Fusion 2 DRAM controller at 0x67
|
||||
if (TestForRGBFusion2DRAMController(busses[bus], 0x67))
|
||||
IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
|
||||
{
|
||||
new_rgb_fusion = new RGBFusion2DRAMController(busses[bus], 0x67);
|
||||
new_controller = new RGBController_RGBFusion2DRAM(new_rgb_fusion);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
// Check for RGB Fusion 2 DRAM controller at 0x67
|
||||
if (TestForRGBFusion2DRAMController(busses[bus], 0x67))
|
||||
{
|
||||
new_rgb_fusion = new RGBFusion2DRAMController(busses[bus], 0x67);
|
||||
new_controller = new RGBController_RGBFusion2DRAM(new_rgb_fusion);
|
||||
rgb_controllers.push_back(new_controller);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -3,30 +3,11 @@
|
|||
#include "RGBController.h"
|
||||
#include "RGBController_SapphireGPU.h"
|
||||
#include "i2c_smbus.h"
|
||||
#include "pci_ids.h"
|
||||
#include <vector>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| AMD vendor ID |
|
||||
\*-----------------------------------------------------*/
|
||||
#define AMD_VEN 0x1002
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| AMD device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define AMD_RX580_DEV 0x67DF
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| Sapphire sub-vendor ID |
|
||||
\*-----------------------------------------------------*/
|
||||
#define SAPPHIRE_SUB_VEN 0x1DA2
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| Sapphire sub-device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define SAPPHIRE_RX580_NITRO_PLUS_SUB_DEV 0xE366
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int pci_vendor;
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@ INCLUDEPATH += \
|
|||
i2c_smbus/ \
|
||||
i2c_tools/ \
|
||||
net_port/ \
|
||||
pci_ids/ \
|
||||
serial_port/ \
|
||||
super_io/ \
|
||||
Controllers/AorusCPUCoolerController/ \
|
||||
|
|
@ -111,6 +112,7 @@ HEADERS += \
|
|||
i2c_smbus/i2c_smbus.h \
|
||||
i2c_tools/i2c_tools.h \
|
||||
net_port/net_port.h \
|
||||
pci_ids/pci_ids.h \
|
||||
qt/DeviceView.h \
|
||||
qt/OpenRGBDialog2.h \
|
||||
qt/OpenRGBProfileSaveDialog.h \
|
||||
|
|
|
|||
70
pci_ids/pci_ids.h
Normal file
70
pci_ids/pci_ids.h
Normal file
|
|
@ -0,0 +1,70 @@
|
|||
/*---------------------------------------------------------*\
|
||||
| PCI Vendor IDs |
|
||||
\*---------------------------------------------------------*/
|
||||
#define AMD_VEN 0x1022
|
||||
#define AMD_GPU_VEN 0x1002
|
||||
#define NVIDIA_VEN 0x10DE
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| AMD Device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define AMD_FCH_SMBUS_DEV 0x790B
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| AMD GPU Device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define AMD_RX580_DEV 0x67DF
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| nVidia Device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define NVIDIA_GTX1070_DEV 0x1B81
|
||||
#define NVIDIA_RTX2060_DEV 0x1F08
|
||||
#define NVIDIA_RTX2060S_DEV 0x1F06
|
||||
#define NVIDIA_RTX2070_DEV 0x1F02
|
||||
#define NVIDIA_RTX2070S_DEV 0x1E84
|
||||
#define NVIDIA_RTX2080_DEV 0x1E87
|
||||
#define NVIDIA_RTX2080S_DEV 0x1E81
|
||||
#define NVIDIA_RTX2080TI_DEV 0x1E07
|
||||
|
||||
/*---------------------------------------------------------*\
|
||||
| PCI Sub-Vendor IDs |
|
||||
\*---------------------------------------------------------*/
|
||||
#define ASUS_SUB_VEN 0x1043
|
||||
#define EVGA_SUB_VEN 0x3842
|
||||
#define MSI_SUB_VEN 0x1462
|
||||
#define SAPPHIRE_SUB_VEN 0x1DA2
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| EVGA Sub-Device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define EVGA_GTX1070_FTW_SUB_DEV 0x6276
|
||||
#define EVGA_RTX2080_XC_GAMING_SUB_DEV 0x2182
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| MSI Sub-Device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define MSI_GTX1070_GAMING_X_SUB_DEV 0x3306
|
||||
#define MSI_RTX2060S_GAMING_X_SUB_DEV 0xC752
|
||||
#define MSI_RTX2070S_GAMING_X_SUB_DEV 0x373e
|
||||
#define MSI_RTX2070S_GAMING_X_TRIO_SUB_DEV 0xC726
|
||||
#define MSI_RTX2080_GAMING_X_TRIO_SUB_DEV 0x3726
|
||||
#define MSI_RTX2080S_GAMING_X_TRIO_SUB_DEV 0xC724
|
||||
#define MSI_RTX2080TI_GAMING_X_TRIO_SUB_DEV 0x3715
|
||||
#define MSI_RTX2060_GAMING_Z_6G_SUB_DEV 0x3754
|
||||
#define MSI_RTX2060_GAMING_Z_6G_SUB_DEV_2 0x3752
|
||||
#define MSI_RTX2070_ARMOR_SUB_DEV 0x3734
|
||||
#define MSI_RTX2060S_ARMOR_OC_SUB_DEV 0xC754
|
||||
#define MSI_RTX2080_SEA_HAWK_EK_X_SUB_DEV 0x3728
|
||||
#define MSI_RTX2080TI_SEA_HAWK_EK_X_SUB_DEV 0x3717
|
||||
|
||||
/*-----------------------------------------------------*\
|
||||
| Sapphire Sub-Device IDs |
|
||||
\*-----------------------------------------------------*/
|
||||
#define SAPPHIRE_RX580_NITRO_PLUS_SUB_DEV 0xE366
|
||||
|
||||
/*---------------------------------------------------------*\
|
||||
| PCI ID Macros |
|
||||
\*---------------------------------------------------------*/
|
||||
#define IF_DRAM_SMBUS(ven, dev) \
|
||||
if((ven == AMD_VEN) && (dev == AMD_FCH_SMBUS_DEV))
|
||||
Loading…
Add table
Add a link
Reference in a new issue