161 lines
4.8 KiB
C
161 lines
4.8 KiB
C
/*******************************************************************************
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@file flash.h
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@brief Contains all functions support for flash driver
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@version 0.0
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@date 27. Nov. 2017
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@author qing.han
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SDK_LICENSE
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*******************************************************************************/
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#ifndef _FLASH_H_
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#define _FLASH_H_
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#include "rom_sym_def.h"
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#include "clock.h"
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#include "types.h"
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#include "gpio.h"
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#include "version.h"
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//#define FLASH_PROTECT_FEATURE
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#define CHIP_MADDR_LEN 6
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#define CHIP_ID_FLASH_ADDRESS 0x11000800
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#define CHIP_MADDR_FLASH_ADDRESS (CHIP_ID_FLASH_ADDRESS+CHIP_ID_LENGTH*4)
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#ifndef FLASH_PROTECT_FEATURE
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#define FLASH_PROTECT_FEATURE 0
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#endif
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#define SPIF_TIMEOUT (0x7ffffff)//1000000
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#define SFLG_WIP 1
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#define SFLG_WEL 2
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#define SFLG_WELWIP 3
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//define flash ucds
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#define FLASH_BASE_ADDR (0x11000000)
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//#define FLASH_UCDS_ADDR_BASE 0x11005000
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#define CHIP_ID_LENGTH 64
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#define CHIP_ID_PID_LEN 16
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#define CHIP_ID_LID_LEN 10
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#define CHIP_ID_MID_LEN 16
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#define CHIP_ID_TID_LEN 14
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#define CHIP_ID_SID_LEN 8
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#define CHIP_MADDR_LEN 6
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//xip flash read instrcution
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#define XFRD_FCMD_READ 0x0000003
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#define XFRD_FCMD_READ_DUAL 0x801003B
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#define XFRD_FCMD_READ_QUAD 0x801006B
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#define FCMD_RESET 0x99 //reset
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#define FCMD_ENRST 0x66 //enable reset
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#define FCMD_WREN 0x06 //write enable
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#define FCMD_WRDIS 0x04 //write disable
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#define FCMD_VSRWREN 0x50 //Volatile SR Write Enable
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#define FCMD_CERASE 0x60 //(or 0xC7)chip erase
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#define FCMD_SERASE 0x20 //sector erase
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#define FCMD_BERASE32 0x52 //block erease 32k
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#define FCMD_BERASE64 0xD8
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#define FCMD_DPWRDN 0xB9 //deep power down
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#define FCMD_RLSDPD 0xAB //release from powerdown(and read device id)
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#define FCMD_WRST 0x01 //write status
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#define FCMD_RDID 0x9F //read ID
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#define FCMD_RDST 0x05 //read status
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#define FCMD_RDST_H 0x35 //read status high byte
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#define FCMD_PPROG 0x02 //page program
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#define FCMD_READ 0x03 //read
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#define FCMD_READF 0x0B //fast read
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#define FCMD_READDO 0x3B //dual output fast read
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#define FCMD_READDIO 0xBB //dual I/O fast read
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#define FCMD_READQO 0x6B //quad output fast read
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#define FCMD_READQIO 0xeB //quad I/O fast read
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#define FCMD_READQIOW 0xe7 //quad I/O fast read word
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typedef struct
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{
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sysclk_t spif_ref_clk; //
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uint32_t rd_instr;
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} xflash_Ctx_t;
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typedef enum
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{
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CHIP_ID_UNCHECK,
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CHIP_ID_EMPTY,
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CHIP_ID_VALID,
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CHIP_ID_INVALID,
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} CHIP_ID_STATUS_e;
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typedef struct
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{
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CHIP_ID_STATUS_e chipMAddrStatus;
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uint8_t mAddr[CHIP_MADDR_LEN];
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} chipMAddr_t;
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typedef struct
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{
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bool init_flag;
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uint32_t IdentificationID;
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uint32_t Capacity;
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} FLASH_CHIP_INFO;
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extern FLASH_CHIP_INFO phy_flash;
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extern int _spif_wait_nobusy(uint8_t flg, uint32_t tout_ns);
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extern int spif_write(uint32_t addr, uint8_t* data, uint32_t size);
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extern int spif_write_dma(uint32_t addr, uint8_t* data, uint32_t size);
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extern int spif_read(uint32_t addr, uint8_t* data, uint32_t size);
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extern int spif_read_dma(uint32_t addr, uint8_t* data, uint32_t size);
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extern int spif_erase_sector(unsigned int addr);
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extern int spif_erase_block64(unsigned int addr);
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extern int spif_erase_all(void);
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extern uint8_t spif_flash_status_reg_0(void);
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extern int spif_write_protect(bool en);
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extern void spif_cmd(uint8_t op, uint8_t addrlen, uint8_t rdlen, uint8_t wrlen, uint8_t mbit, uint8_t dummy);
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extern void spif_rddata(uint8_t* data, uint8_t len);
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extern int spif_config(sysclk_t ref_clk, uint8_t div, uint32_t rd_instr, uint8_t mode_bit, uint8_t QE);
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int hal_spif_cache_init(sysclk_t spif_ref_clk, uint32_t rd_instr);
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//static void hal_cache_tag_flush(void);
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#if(FLASH_PROTECT_FEATURE == 1)
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int hal_flash_lock(void);
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int hal_flash_unlock(void);
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uint8_t hal_flash_get_lock_state(void);
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#endif
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int hal_flash_write(uint32_t addr, uint8_t* data, uint32_t size);
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int hal_flash_write_by_dma(uint32_t addr, uint8_t* data, uint32_t size);
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int hal_flash_read(uint32_t addr, uint8_t* data, uint32_t size);
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int hal_flash_erase_sector(unsigned int addr);
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int hal_flash_erase_block64(unsigned int addr);
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int flash_write_word(unsigned int offset, uint32_t value);
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CHIP_ID_STATUS_e chip_id_one_bit_hot_convter(uint8_t* b,uint32_t w);
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void LL_PLUS_LoadMACFromFlash(uint32_t addr);
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CHIP_ID_STATUS_e LL_PLUS_LoadMACFromChipMAddr(void);
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CHIP_ID_STATUS_e read_chip_mAddr(uint8_t * mAddr);
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int hal_get_flash_info(void);
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//void check_chip_mAddr(void);
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//void LOG_CHIP_MADDR(void);
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#endif
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