505 lines
12 KiB
C
505 lines
12 KiB
C
/*******************************************************************************
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@file uart.c
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@brief Contains all functions support for uart driver
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@version 0.0
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@date 19. Oct. 2017
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@author qing.han
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SDK_LICENSE
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*******************************************************************************/
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#include "rom_sym_def.h"
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#include <string.h>
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#include "bus_dev.h"
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#include "mcu.h"
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#include "gpio.h"
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#include "clock.h"
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#include "uart.h"
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#include "pwrmgr.h"
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#include "error.h"
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#include "jump_function.h"
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#define UART_TX_BUFFER_SIZE 256
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typedef struct _uart_Context
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{
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bool enable;
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uint8_t tx_state;
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uart_Tx_Buf_t tx_buf;
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uart_Cfg_t cfg;
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} uart_Ctx_t;
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static uart_Ctx_t m_uartCtx[2] =
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{
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{.enable = FALSE,},
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{.enable = FALSE,},
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};
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static int txmit_buf_use_tx_buf(UART_INDEX_e uart_index,uint8_t* buf,uint16_t len)
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{
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uart_Tx_Buf_t* p_txbuf = &(m_uartCtx[uart_index].tx_buf);
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uint8_t* p_data;
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AP_UART_TypeDef* cur_uart = (AP_UART_TypeDef*) AP_UART0_BASE;
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if(len == 0 || buf == NULL)
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return PPlus_ERR_INVALID_PARAM;
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if(p_txbuf->tx_state == TX_STATE_UNINIT)
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return PPlus_ERR_NO_MEM;
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if(p_txbuf->tx_buf_size < len)
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return PPlus_ERR_NO_MEM;
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if(p_txbuf->tx_state != TX_STATE_IDLE)
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{
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if(p_txbuf->tx_data_size + len > p_txbuf->tx_buf_size)
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return PPlus_ERR_NO_MEM;
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HAL_ENTER_CRITICAL_SECTION();
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memcpy(p_txbuf->tx_buf + p_txbuf->tx_data_size, buf, len);
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p_txbuf->tx_data_size += len;
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HAL_EXIT_CRITICAL_SECTION();
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return PPlus_SUCCESS;
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}
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memcpy(p_txbuf->tx_buf, buf, len);
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p_txbuf->tx_data_size = len;
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p_txbuf->tx_data_offset = 0;
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p_txbuf->tx_state = TX_STATE_TX;
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p_data = p_txbuf->tx_buf;
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// len = p_txbuf->tx_data_size;
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len = len > UART_TX_FIFO_SIZE ? UART_TX_FIFO_SIZE : len;
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if(uart_index == UART1)
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cur_uart = (AP_UART_TypeDef*) AP_UART1_BASE;
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cur_uart->IER &= ~(IER_ETBEI);
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while(len--)
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{
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cur_uart->THR = p_data[p_txbuf->tx_data_offset++];
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}
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if(uart_index == UART0)
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hal_pwrmgr_lock(MOD_UART0);
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else
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hal_pwrmgr_lock(MOD_UART1);
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cur_uart->IER |= IER_ETBEI;
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return PPlus_SUCCESS;
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}
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static int txmit_buf_polling(UART_INDEX_e uart_index,uint8_t* buf,uint16_t len)
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{
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//volatile int timeout = 0;
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AP_UART_TypeDef* cur_uart = (AP_UART_TypeDef*) AP_UART0_BASE;
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if(uart_index == UART1)
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cur_uart = (AP_UART_TypeDef*) AP_UART1_BASE;
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HAL_WAIT_CONDITION_TIMEOUT(!(cur_uart->USR & USR_BUSY), 100000);
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while(len--)
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{
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HAL_WAIT_CONDITION_TIMEOUT((cur_uart->LSR & LSR_THRE), 100000);
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cur_uart->THR = *buf++;
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//timeout=0;
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}
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//wait shift register empty
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HAL_WAIT_CONDITION_TIMEOUT((cur_uart->LSR & LSR_TEMT), 100000);
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return PPlus_SUCCESS;;
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}
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static void __ATTR_SECTION_SRAM__ irq_rx_handler(UART_INDEX_e uart_index,uint8_t flg)
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{
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int i;
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uint8_t data[UART_RX_FIFO_SIZE];
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uint8_t len;
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AP_UART_TypeDef* cur_uart = (AP_UART_TypeDef*)AP_UART0_BASE;
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if(uart_index == UART1)
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{
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cur_uart = (AP_UART_TypeDef*) AP_UART1_BASE;
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}
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if(m_uartCtx[uart_index].cfg.use_fifo)
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{
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len = cur_uart->RFL;
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for(i = 0; i< len; i++)
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data[i] = (uint8_t)(cur_uart->RBR & 0xff);
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}
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else
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{
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len = 1;
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cur_uart->LSR; //clear interrupt
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data[0] = (uint8_t)(cur_uart->RBR & 0xff);
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}
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if(m_uartCtx[uart_index].cfg.evt_handler)
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{
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uart_Evt_t evt;
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evt.type = flg;
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evt.data = data;
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evt.len = len;
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m_uartCtx[uart_index].cfg.evt_handler(&evt);
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}
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}
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static void __ATTR_SECTION_SRAM__ irq_tx_empty_handler(UART_INDEX_e uart_index)
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{
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uart_Tx_Buf_t* p_txbuf = &(m_uartCtx[uart_index].tx_buf);
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uint8_t* p_data;
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uint16_t len;
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AP_UART_TypeDef* cur_uart = (AP_UART_TypeDef*)AP_UART0_BASE;
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if(m_uartCtx[uart_index].enable == FALSE)
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return;
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if(m_uartCtx[uart_index].cfg.use_fifo == FALSE)
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return;
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if(m_uartCtx[uart_index].cfg.use_tx_buf == FALSE)
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return;
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if(p_txbuf->tx_state != TX_STATE_TX)
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return;
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p_data = p_txbuf->tx_buf;
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len = p_txbuf->tx_data_size - p_txbuf->tx_data_offset;
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len = len > UART_TX_FIFO_SIZE ? UART_TX_FIFO_SIZE : len;
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if(len == 0)
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{
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p_txbuf->tx_state = TX_STATE_IDLE;
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p_txbuf->tx_data_offset = 0;
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p_txbuf->tx_data_size = 0;
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if(m_uartCtx[uart_index].cfg.evt_handler)
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{
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uart_Evt_t evt =
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{
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.type = UART_EVT_TYPE_TX_COMPLETED,
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.data = NULL,
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.len = 0,
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};
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m_uartCtx[uart_index].cfg.evt_handler(&evt);
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}
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if(UART0 == uart_index)
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hal_pwrmgr_unlock(MOD_UART0);
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else
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hal_pwrmgr_unlock(MOD_UART1);
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return;
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}
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if(uart_index == UART1)
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cur_uart = (AP_UART_TypeDef*) AP_UART1_BASE;
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while(len--)
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{
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cur_uart->THR = p_data[p_txbuf->tx_data_offset++];
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}
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}
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static int uart_hw_deinit(UART_INDEX_e uart_index)
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{
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MODULE_e mod = MOD_UART0;
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IRQn_Type irq_type = UART0_IRQn;
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AP_UART_TypeDef* cur_uart = AP_UART0;
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if(uart_index== UART1)
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{
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mod = MOD_UART1;
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irq_type = UART1_IRQn;
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cur_uart = AP_UART1;
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}
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NVIC_DisableIRQ(irq_type);
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hal_gpio_fmux(m_uartCtx[uart_index].cfg.tx_pin,Bit_DISABLE);
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hal_gpio_fmux(m_uartCtx[uart_index].cfg.rx_pin,Bit_DISABLE);
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cur_uart->LCR=0x80;
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cur_uart->DLM=0;
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cur_uart->DLL=0;
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cur_uart->LCR =0;
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cur_uart->FCR=0;
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cur_uart->IER = 0;
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//hal_clk_gate_enable(mod);
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hal_clk_reset(mod);
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hal_clk_gate_disable(mod);
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if(uart_index== UART0)
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{
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JUMP_FUNCTION(UART0_IRQ_HANDLER) = 0;
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}
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else
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{
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JUMP_FUNCTION(UART1_IRQ_HANDLER) = 0;
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}
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return PPlus_SUCCESS;
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}
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static int uart_hw_init(UART_INDEX_e uart_index)
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{
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uart_Cfg_t* pcfg;
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int pclk = clk_get_pclk();
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uint32_t dll;
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AP_UART_TypeDef* cur_uart = AP_UART0;
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MODULE_e mod = MOD_UART0;
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IRQn_Type irq_type = UART0_IRQn;
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gpio_fmux_e fmux_tx = FMUX_UART0_TX, fmux_rx = FMUX_UART0_RX;
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uart_hw_deinit(uart_index);
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if(uart_index== UART1)
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{
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cur_uart = AP_UART1;
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mod = MOD_UART1;
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irq_type = UART1_IRQn;
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fmux_tx = FMUX_UART1_TX;
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fmux_rx = FMUX_UART1_RX;
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}
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if((m_uartCtx[uart_index].cfg.tx_pin == GPIO_DUMMY) && (m_uartCtx[uart_index].cfg.rx_pin == GPIO_DUMMY))
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return PPlus_ERR_INVALID_PARAM;
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pcfg = &(m_uartCtx[uart_index].cfg);
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hal_clk_gate_enable(mod);
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hal_clk_reset(mod);
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// if(m_uartCtx[uart_index].enable == FALSE){
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// hal_gpio_fmux(P9, Bit_DISABLE);
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// hal_gpio_fmux(P10, Bit_DISABLE);
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// }
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hal_gpio_pull_set(pcfg->tx_pin, GPIO_PULL_UP);
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hal_gpio_pull_set(pcfg->rx_pin, GPIO_PULL_UP);
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hal_gpio_fmux_set(pcfg->tx_pin, fmux_tx);
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hal_gpio_fmux_set(pcfg->rx_pin, fmux_rx);
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cur_uart->LCR =0;
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dll = ((pclk>>4)+(pcfg->baudrate>>1))/pcfg->baudrate;
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cur_uart->MCR=0x0;
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cur_uart->LCR=0x80;
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cur_uart->DLM=(dll & 0xFF00) >> 8;
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cur_uart->DLL=(dll & 0xFF);
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if(pcfg->parity)
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cur_uart->LCR = 0x1b; //8bit, 1 stop even parity
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else
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cur_uart->LCR = 0x3; //8bit, 1 stop no parity
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if(pcfg->use_fifo)//set fifo, enable tx FIFO mode(empty trigger), rx FIFO mode(1/2 trigger)
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cur_uart->FCR= FCR_TX_FIFO_RESET|FCR_RX_FIFO_RESET|FCR_FIFO_ENABLE|UART_FIFO_RX_TRIGGER|UART_FIFO_TX_TRIGGER;
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else
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cur_uart->FCR=0;
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//enable Received Data Available Interrupt
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cur_uart->IER = IER_ERBFI;
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if(pcfg->use_fifo)
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cur_uart->IER |= IER_PTIME;
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if(pcfg->use_tx_buf)
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cur_uart->IER |= IER_ETBEI;
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if(uart_index== UART0)
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{
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JUMP_FUNCTION(UART0_IRQ_HANDLER) = (uint32_t)&hal_UART0_IRQHandler;
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}
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else
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{
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JUMP_FUNCTION(UART1_IRQ_HANDLER) = (uint32_t)&hal_UART1_IRQHandler;
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}
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NVIC_SetPriority(irq_type, IRQ_PRIO_HAL);
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NVIC_EnableIRQ(irq_type);
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return PPlus_SUCCESS;
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}
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/**************************************************************************************
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@fn hal_UART0_IRQHandler
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@brief This function process for uart interrupt
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input parameters
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@param None.
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output parameters
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@param None.
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@return None.
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**************************************************************************************/
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void __ATTR_SECTION_SRAM__ __attribute__((used)) hal_UART0_IRQHandler(void)
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{
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uint8_t IRQ_ID= (AP_UART0->IIR & 0x0f);
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//if(m_uartCtx[UART0].enable == FALSE)
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// return;
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switch(IRQ_ID)
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{
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case TIMEOUT_IRQ:
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irq_rx_handler(UART0,UART_EVT_TYPE_RX_DATA_TO);
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break;
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case RDA_IRQ:
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irq_rx_handler(UART0,UART_EVT_TYPE_RX_DATA);
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break;
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case THR_EMPTY:
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irq_tx_empty_handler(UART0);
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break;
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case RLS_IRQ:
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break;
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case BUSY_IRQ:
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(void)AP_UART0->USR;
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break;
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default:
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break;
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}
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}
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void __ATTR_SECTION_SRAM__ __attribute__((used)) hal_UART1_IRQHandler(void)
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{
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uint8_t IRQ_ID= (AP_UART1->IIR & 0x0f);
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//if(m_uartCtx[UART1].enable == FALSE)
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// return;
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switch(IRQ_ID)
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{
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case TIMEOUT_IRQ:
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irq_rx_handler(UART1,UART_EVT_TYPE_RX_DATA_TO);
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break;
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case RDA_IRQ:
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irq_rx_handler(UART1,UART_EVT_TYPE_RX_DATA);
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break;
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case THR_EMPTY:
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irq_tx_empty_handler(UART1);
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break;
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case RLS_IRQ:
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break;
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case BUSY_IRQ:
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(void)AP_UART1->USR;
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break;
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default:
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break;
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}
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}
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static void uart_wakeup_process_0(void)
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{
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uart_hw_init(UART0);
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}
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static void uart_wakeup_process_1(void)
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{
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uart_hw_init(UART1);
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}
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int hal_uart_init(uart_Cfg_t cfg,UART_INDEX_e uart_index)
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{
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if(m_uartCtx[uart_index].enable)
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return PPlus_ERR_BUSY;
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//if(cfg.hw_fwctrl || cfg.parity)
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// return PPlus_ERR_NOT_SUPPORTED;
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if(cfg.hw_fwctrl)
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return PPlus_ERR_NOT_SUPPORTED;
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memset(&(m_uartCtx[uart_index]), 0, sizeof(uart_Ctx_t));
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memcpy(&(m_uartCtx[uart_index].cfg), &cfg, sizeof(uart_Cfg_t));
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uart_hw_init(uart_index);
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m_uartCtx[uart_index].enable = TRUE;
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if(uart_index == UART0)
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hal_pwrmgr_register(MOD_UART0, NULL, uart_wakeup_process_0);
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else
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hal_pwrmgr_register(MOD_UART1, NULL, uart_wakeup_process_1);
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return PPlus_SUCCESS;
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}
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int hal_uart_deinit(UART_INDEX_e uart_index)
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{
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uart_hw_deinit(uart_index);
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memset(&(m_uartCtx[uart_index]), 0, sizeof(uart_Ctx_t));
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m_uartCtx[uart_index].enable = FALSE;
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if(uart_index == UART0)
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hal_pwrmgr_unregister(MOD_UART0);
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else
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hal_pwrmgr_unregister(MOD_UART1);
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return PPlus_SUCCESS;
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}
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int hal_uart_set_tx_buf(UART_INDEX_e uart_index,uint8_t* buf, uint16_t size)
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{
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uart_Tx_Buf_t* p_txbuf = &(m_uartCtx[uart_index].tx_buf);
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if(m_uartCtx[uart_index].enable == FALSE)
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return PPlus_ERR_INVALID_STATE;
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if(m_uartCtx[uart_index].cfg.use_tx_buf == FALSE)
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return PPlus_ERR_NOT_SUPPORTED;
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if(p_txbuf->tx_state != TX_STATE_UNINIT)
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return PPlus_ERR_INVALID_STATE;
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HAL_ENTER_CRITICAL_SECTION();
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p_txbuf->tx_buf = buf;
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p_txbuf->tx_buf_size = size;
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p_txbuf->tx_data_offset = 0;
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p_txbuf->tx_data_size= 0;
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p_txbuf->tx_state = TX_STATE_IDLE;
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HAL_EXIT_CRITICAL_SECTION();
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return PPlus_SUCCESS;
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}
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int hal_uart_get_tx_ready(UART_INDEX_e uart_index)
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{
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if(m_uartCtx[uart_index].cfg.use_tx_buf == FALSE)
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return PPlus_SUCCESS;
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if(m_uartCtx[uart_index].tx_buf.tx_state == TX_STATE_IDLE)
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return PPlus_SUCCESS;
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return PPlus_ERR_BUSY;
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}
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int hal_uart_send_buff(UART_INDEX_e uart_index,uint8_t* buff,uint16_t len)
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{
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if(m_uartCtx[uart_index].cfg.use_tx_buf)
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{
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return txmit_buf_use_tx_buf(uart_index,buff,len);
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}
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return txmit_buf_polling(uart_index,buff,len);
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}
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int hal_uart_send_byte(UART_INDEX_e uart_index,unsigned char data)
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{
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AP_UART_TypeDef* cur_uart = (AP_UART_TypeDef*) AP_UART0_BASE;
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if(uart_index == UART1)
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cur_uart = (AP_UART_TypeDef*) AP_UART1_BASE;
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HAL_WAIT_CONDITION_TIMEOUT((cur_uart->LSR & LSR_THRE), 10000);
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cur_uart->THR=data;
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HAL_WAIT_CONDITION_TIMEOUT((cur_uart->LSR & LSR_TEMT), 10000);
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return PPlus_SUCCESS;
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}
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