diff --git a/bthome_phy6222/SDK/lib/rf/patch.c b/bthome_phy6222/SDK/lib/rf/patch.c
index 36bcb7b..7d607fe 100644
--- a/bthome_phy6222/SDK/lib/rf/patch.c
+++ b/bthome_phy6222/SDK/lib/rf/patch.c
@@ -21,6 +21,7 @@
 #include "rf_phy_driver.h"
 #include "global_config.h"
 #include "jump_function.h"
+#include "pwrmgr.h"
 #include "uart.h"
 #include "ll_sleep.h"
 #include "ll_debug.h"
@@ -5639,6 +5640,7 @@ void config_RTC1(uint32 time)
     @return      None.
 */
 uint32 sleep_total;
+extern uint32 g_stack;
 #ifdef __GNUC__
 // Indicate that the specified function does not need prologue/epilogue sequences
 // generated by the compiler. And function doesn't return. 
@@ -5652,6 +5654,8 @@ void wakeupProcess1(void)
     //restore initial_sp according to the app_initial_sp : 20180706 ZQ
     __set_MSP(pGlobal_config[INITIAL_STACK_PTR]);
     HAL_CRITICAL_SECTION_INIT();
+    // All memory on
+    hal_pwrmgr_RAM_retention_clr();
 
     //====  20180416 commented by ZQ
     //      to enable flash access after wakeup
@@ -5812,6 +5816,7 @@ void wakeupProcess1(void)
         g_llSleepContext.isTimer4RecoverRequired = FALSE;
     }
 
+    __set_MSP((uint32_t)(&g_stack));
     // app could add operation after wakeup
     app_wakeup_process();
 //    uart_tx0(" 111 ");
@@ -7643,20 +7648,25 @@ llStatus_t LL_StartEncrypt1( uint16 connId,
 
 
 // global configuration in SRAM, it could be change by application
+// ================== VARIABLES  ==================================
+extern uint32    global_config[];
+extern uint32_t  g_irqstack_top;
+
 // TODO: when integrate, the global_config should be set by APP project
-__ATTR_SECTION_XIP__ void init_config(void)
+__ATTR_SECTION_XIP__
+void init_config(void)
 {
-    pGlobal_config = (uint32*)(CONFIG_BASE_ADDR);
+    pGlobal_config = global_config;
     int i;
 
     for (i = 0; i < 256; i ++)
         pGlobal_config[i] = 0;
 
     //save the app initial_sp  which will be used in wakeupProcess 20180706 by ZQ
-//    pGlobal_config[INITIAL_STACK_PTR] = 0x400 + (uint32_t)&_ebss; // g_top_irqstack;
+    pGlobal_config[INITIAL_STACK_PTR] = (uint32_t)(&g_irqstack_top);
     // LL switch setting
-    pGlobal_config[LL_SWITCH] =  LL_DEBUG_ALLOW | SLAVE_LATENCY_ALLOW | LL_WHITELIST_ALLOW
-                                 | SIMUL_CONN_ADV_ALLOW | SIMUL_CONN_SCAN_ALLOW; //RC32_TRACKINK_ALLOW
+    pGlobal_config[LL_SWITCH] = LL_DEBUG_ALLOW | SLAVE_LATENCY_ALLOW | LL_WHITELIST_ALLOW
+                              | SIMUL_CONN_ADV_ALLOW | SIMUL_CONN_SCAN_ALLOW; //RC32_TRACKINK_ALLOW
 
     if(g_clk32K_config == CLK_32K_XTAL)
         pGlobal_config[LL_SWITCH] &= 0xffffffee;