correct INITIAL_STACK_PTR
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8 changed files with 2821 additions and 2898 deletions
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@ -5,7 +5,7 @@ Custom firmware for Tuya [THB2](https://pvvx.github.io/THB2).
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В плане проекта предусматривается дальнейшая поддержка BTH01 и [TH-05](https://pvvx.github.io/TH-05).
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Прошивка V0.3 для THB2 (файл TestTHB2.hex). Всё, кроме OTA работает стабильно.
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Прошивка V0.4 для THB2 (файл TestTHB2.hex). Всё, кроме OTA работает стабильно.
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## Основные характеристики:
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5670
TestTHB2.hex
5670
TestTHB2.hex
File diff suppressed because it is too large
Load diff
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@ -301,11 +301,11 @@ void peripheral_interrupt_restore_default(void)
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int __attribute__((used)) hal_pwrmgr_wakeup_process(void)
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{
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int i;
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#ifdef CFG_FLASH_ENABLE_DEEP_SLEEP
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#ifdef CFG_FLASH_ENABLE_DEEP_SLEEP
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extern void spif_release_deep_sleep(void);
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spif_release_deep_sleep();
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WaitRTCCount(8);
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#endif
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#endif
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AP_PCR->SW_CLK = s_config_swClk0;
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AP_PCR->SW_CLK1 = s_config_swClk1|0x01;//force set M0 CPU
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s_gpio_wakeup_src_group1 = AP_AON->GPIO_WAKEUP_SRC[0];
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@ -455,6 +455,7 @@ void wakeupProcess0(void)
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// uart_tx0(" 111 ");
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ll_debug_output(DEBUG_WAKEUP);
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set_sleep_flag(0);
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// ==== measure value, from RTC counter meet comparator 0 -> here : 260us ~ 270us
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// start task loop
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osal_start_system();
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@ -5445,16 +5445,16 @@ void wakeup_init1()
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// < 14>:en_dig_clk_48M;
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// < 15>:en_dig_clk_64M;
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// < 16>:en_dig_clk_96M;
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#if (DBG_BUILD_LL_TIMING)
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#if (DBG_BUILD_LL_TIMING)
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//====== for timing debug============
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gpio_write(DBG_PIN_SYS_CLK_SWITCH, 1);
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gpio_write(DBG_PIN_SYS_CLK_SWITCH, 0);
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//PHY_REG_WT(AP_IOMUX_BASE+8,1);//en debugMux[0]
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#endif
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#endif
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//each rtc count is about 30.5us
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//after 15count , xtal will be feedout to dll and doubler
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//WaitRTCCount(pGlobal_config[WAKEUP_DELAY]);
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#if 0
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#if 0
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volatile uint32_t delay=0;
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for(uint8_t i=0; i<10; i++)
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@ -5465,7 +5465,7 @@ void wakeup_init1()
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while(delay -- > 0) {};
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}
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#endif
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#endif
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if(g_system_clk == SYS_CLK_XTAL_16M )
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{
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@ -5550,14 +5550,14 @@ void wakeup_init1()
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set_max_length(0xff);
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ll_hw_set_empty_head(0x0001);
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//time related setting
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ll_hw_set_rx_timeout_1st( 500);
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ll_hw_set_rx_timeout( 88); //ZQ 20180606, reduce rx timeout for power saving
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ll_hw_set_rx_timeout_1st(500);
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ll_hw_set_rx_timeout(88); //ZQ 20180606, reduce rx timeout for power saving
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//preamble + syncword=40us, sync process = 8us
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//timeout should be larger then 48us,
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//ll_hw_set_rx_timeout( 268); //for ble shoulde be larger than 80+128. if sync, the timeout timer stop.
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// (80 + 128) - BLE 5.0 preamble + access time, 60 for HW process delay
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// this time doesn't consider HW startup time, it is set in other regs
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ll_hw_set_loop_timeout( 30000);
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ll_hw_set_loop_timeout(30000);
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// ll_hw_set_tx_rx_release (10, 1);
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// ll_hw_set_rx_tx_interval( 57); //T_IFS=150us for BLE 1M
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// ll_hw_set_tx_rx_interval( 65); //T_IFS=150us for BLE 1M
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@ -5615,10 +5615,10 @@ void config_RTC1(uint32 time)
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}
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}
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#if 0
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#if 0
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extern uint32 sleep_total;
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LOG("%d %d %d\n",conn_param[0].currentEvent,sleep_total,counter_tracking);
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#endif
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#endif
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}
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#if 1
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@ -5821,6 +5821,8 @@ void wakeupProcess1(void)
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// start task loop
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osal_start_system();
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}
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void enter_sleep_off_mode1(Sleep_Mode mode)
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{
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if(mode==SYSTEM_SLEEP_MODE)
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@ -7651,7 +7653,7 @@ __ATTR_SECTION_XIP__ void init_config(void)
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pGlobal_config[i] = 0;
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//save the app initial_sp which will be used in wakeupProcess 20180706 by ZQ
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pGlobal_config[INITIAL_STACK_PTR] = (uint32_t)&g_top_irqstack;
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// pGlobal_config[INITIAL_STACK_PTR] = 0x400 + (uint32_t)&_ebss; // g_top_irqstack;
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// LL switch setting
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pGlobal_config[LL_SWITCH] = LL_DEBUG_ALLOW | SLAVE_LATENCY_ALLOW | LL_WHITELIST_ALLOW
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| SIMUL_CONN_ADV_ALLOW | SIMUL_CONN_SCAN_ALLOW; //RC32_TRACKINK_ALLOW
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@ -65,7 +65,7 @@ SECTIONS
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_ebss = ABSOLUTE(.);
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} > sram
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/*
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/*
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.int_stack : {
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. = ALIGN(4);
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*(int_stack)
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@ -73,7 +73,7 @@ SECTIONS
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_stack_top = ABSOLUTE(.);
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} > sram
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*/
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/* stack 32 kbytes */
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g_top_irqstack = ORIGIN(sram) + LENGTH(sram);
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.common_text : {
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@ -5,6 +5,7 @@
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#include "bus_dev.h"
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#include "gpio.h"
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#include "clock.h"
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#include "global_config.h"
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#include "timer.h"
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#include "jump_function.h"
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#include "pwrmgr.h"
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@ -152,10 +153,19 @@ static void hal_low_power_io_init(void) {
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DIG_LDO_CURRENT_SETTING(0x01);
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#if defined ( __GNUC__ )
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extern int _ebss;
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if ((uint32_t) &_ebss >= 0x1fff8000)
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/*
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if ((uint32_t) &_ebss >= (0x20000000 - 0x400)) { // - INITIAL_STACK 1kbytes
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hal_pwrmgr_RAM_retention(RET_SRAM0 | RET_SRAM1 | RET_SRAM2); // RET_SRAM0|RET_SRAM1|RET_SRAM2
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pGlobal_config[INITIAL_STACK_PTR] = 0x20000000;
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} else
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*/
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if ((uint32_t) &_ebss >= (0x1fff8000 - 0x400)) { // - INITIAL_STACK 1kbytes
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hal_pwrmgr_RAM_retention(RET_SRAM0 | RET_SRAM1); // RET_SRAM0|RET_SRAM1|RET_SRAM2
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else
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pGlobal_config[INITIAL_STACK_PTR] = 0x1fffC000;
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} else {
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hal_pwrmgr_RAM_retention(RET_SRAM0); // RET_SRAM0|RET_SRAM1|RET_SRAM2
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pGlobal_config[INITIAL_STACK_PTR] = 0x1fff8000;
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}
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#else
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#if DEBUG_INFO || SDK_VER_RELEASE_ID != 0x03010102
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@ -151,7 +151,7 @@ __ATTR_SECTION_XIP__ void init_sensor(void) {
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send_i2c_byte(0, 0x06); // Reset command using the general call address
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WaitMs(3);
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send_i2c_wreg(CHT8310_I2C_ADDR0, CHT8310_REG_CRT, 0x0300); // Set conversion ratio 5 sec
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WaitMs(1);
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//WaitMs(1);
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read_i2c_bytes(CHT8310_I2C_ADDR0, CHT8310_REG_ID, (uint8 *)&th_sensor_id, 2);
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deinit_i2c();
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}
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