116 lines
4 KiB
C++
116 lines
4 KiB
C++
/*---------------------------------------------------------*\
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| i2c_smbus_i801.h |
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| i801 SMBUS driver for Windows |
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| Adam Honse (CalcProgrammer1) 29 Jan 2019 |
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| Portions based on Linux source code |
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| This file is part of the OpenRGB project |
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| SPDX-License-Identifier: GPL-2.0-only |
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\*---------------------------------------------------------*/
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#pragma once
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#include "i2c_smbus.h"
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#ifdef _WIN32
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#include <Windows.h>
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#endif
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/* BIT shifting macro */
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#define BIT(x) ( 1 << x )
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/* I801 SMBus address offsets */
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#define SMBHSTSTS (0 + i801_smba)
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#define SMBHSTCNT (2 + i801_smba)
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#define SMBHSTCMD (3 + i801_smba)
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#define SMBHSTADD (4 + i801_smba)
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#define SMBHSTDAT0 (5 + i801_smba)
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#define SMBHSTDAT1 (6 + i801_smba)
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#define SMBBLKDAT (7 + i801_smba)
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#define SMBPEC (8 + i801_smba) /* ICH3 and later */
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#define SMBAUXSTS (12 + i801_smba) /* ICH4 and later */
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#define SMBAUXCTL (13 + i801_smba) /* ICH4 and later */
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#define SMBSLVSTS (16 + i801_smba) /* ICH3 and later */
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#define SMBSLVCMD (17 + i801_smba) /* ICH3 and later */
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#define SMBNTFDADD (20 + i801_smba) /* ICH3 and later */
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/* Auxiliary status register bits, ICH4+ only */
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#define SMBAUXSTS_CRCE BIT(0)
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#define SMBAUXSTS_STCO BIT(1)
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/* Auxiliary control register bits, ICH4+ only */
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#define SMBAUXCTL_CRC BIT(0)
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#define SMBAUXCTL_E32B BIT(1)
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/* Other settings */
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#define MAX_RETRIES 400
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/* I801 command constants */
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#define I801_QUICK 0x00
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#define I801_BYTE 0x04
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#define I801_BYTE_DATA 0x08
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#define I801_WORD_DATA 0x0C
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#define I801_PROC_CALL 0x10 /* unimplemented */
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#define I801_BLOCK_DATA 0x14
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#define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */
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/* I801 Host Control register bits */
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#define SMBHSTCNT_INTREN BIT(0)
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#define SMBHSTCNT_KILL BIT(1)
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#define SMBHSTCNT_LAST_BYTE BIT(5)
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#define SMBHSTCNT_START BIT(6)
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#define SMBHSTCNT_PEC_EN BIT(7) /* ICH3 and later */
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/* I801 Hosts Status register bits */
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#define SMBHSTSTS_BYTE_DONE BIT(7)
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#define SMBHSTSTS_INUSE_STS BIT(6)
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#define SMBHSTSTS_SMBALERT_STS BIT(5)
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#define SMBHSTSTS_FAILED BIT(4)
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#define SMBHSTSTS_BUS_ERR BIT(3)
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#define SMBHSTSTS_DEV_ERR BIT(2)
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#define SMBHSTSTS_INTR BIT(1)
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#define SMBHSTSTS_HOST_BUSY BIT(0)
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/* Host Notify Status register bits */
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#define SMBSLVSTS_HST_NTFY_STS BIT(0)
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/* Host Notify Command register bits */
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#define SMBSLVCMD_HST_NTFY_INTREN BIT(0)
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#define STATUS_ERROR_FLAGS (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR)
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#define STATUS_FLAGS (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | STATUS_ERROR_FLAGS)
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/* I801 Host Config */
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#define SMBHSTCFG 0x040
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#define SMBHSTCFG_HST_EN BIT(0)
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#ifdef _WIN32
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#define GLOBAL_SMBUS_MUTEX_NAME "Global\\Access_SMBUS.HTP.Method"
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#endif
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class i2c_smbus_i801 : public i2c_smbus_interface
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{
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public:
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u16 i801_smba = 0xF000;
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i2c_smbus_i801();
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~i2c_smbus_i801();
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private:
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s32 i801_access(u16 addr, char read_write, u8 command, int size, i2c_smbus_data *data);
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int i801_block_transaction(i2c_smbus_data *data, char read_write, int command, int hwpec);
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int i801_block_transaction_byte_by_byte(i2c_smbus_data *data, char read_write, int command, int hwpec);
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int i801_check_post(int status);
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int i801_check_pre();
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int i801_transaction(int xact);
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int i801_wait_byte_done();
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int i801_wait_intr();
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s32 i2c_smbus_xfer(u8 addr, char read_write, u8 command, int size, i2c_smbus_data* data);
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s32 i2c_xfer(u8 addr, char read_write, int* size, u8* data);
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#ifdef _WIN32
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HANDLE global_smbus_access_handle = NULL;
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#endif
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};
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