142 lines
6.8 KiB
C++
142 lines
6.8 KiB
C++
/*---------------------------------------------------------*\
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| GigabyteSuperIORGBController.cpp |
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| Driver for Gigabyte Aorus Super IO motherboard |
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| Ryan Frankcombe (422gRdHuX5uk) 11 Sep 2022 |
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| This file is part of the OpenRGB project |
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| SPDX-License-Identifier: GPL-2.0-only |
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\*---------------------------------------------------------*/
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#include "GigabyteSuperIORGBController.h"
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#include "super_io.h"
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GigabyteSuperIORGBController::GigabyteSuperIORGBController(int sioaddr, std::string dev_name)
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{
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gig_sioaddr = sioaddr;
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name = dev_name;
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}
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GigabyteSuperIORGBController::~GigabyteSuperIORGBController()
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{
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}
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std::string GigabyteSuperIORGBController::GetDeviceLocation()
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{
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char hex[12];
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snprintf(hex, sizeof(hex), "0x%X", gig_sioaddr);
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return("SIO: " + std::string(hex));
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}
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std::string GigabyteSuperIORGBController::GetDeviceName()
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{
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return(name);
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}
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void GigabyteSuperIORGBController::ChipEntry()
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{
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/*--------------------------------*\
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| Chip Entry Command |
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\*_-------------------------------*/
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superio_enter(gig_sioaddr);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_CHIPENTRY_REGISTER_1, GIGABYTE_SUPERIO_CHIPENTRY_VALUE_1);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_CHIPENTRY_REGISTER_2, GIGABYTE_SUPERIO_CHIPENTRY_VALUE_2);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_CHIPENTRY_REGISTER_2, GIGABYTE_SUPERIO_CHIPENTRY_VALUE_2);
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/*--------------------------------*\
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| Chip Select Command |
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\*_-------------------------------*/
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_CHIPSELECT_REGISTER_1, GIGABYTE_SUPERIO_CHIPSELECT_VALUE_1);
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}
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void GigabyteSuperIORGBController::ChipExit()
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{
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/*-----------------------------------------------------------------------------------*\
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| Chip Exit Command |
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| Per https://pdf1.alldatasheetde.com/datasheet-pdf/download/1132513/ITE/IT8712F.html |
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\*_----------------------------------------------------------------------------------*/
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_CHIPEXIT_REGISTER_1, GIGABYTE_SUPERIO_CHIPEXIT_VALUE_1);
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}
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void GigabyteSuperIORGBController::SetColor(unsigned int red, unsigned int green, unsigned int blue)
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{
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/*--------------------------------*\
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| Chip Entry Command |
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\*_-------------------------------*/
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ChipEntry();
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/*--------------------------------*\
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| Set Colors |
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\*_-------------------------------*/
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RED_REGISTER_1, red);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_GREEN_REGISTER_1, green);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_BLUE_REGISTER_1, blue);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RED_REGISTER_2, red);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_GREEN_REGISTER_2, green);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_BLUE_REGISTER_2, blue);
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/*--------------------------------*\
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| Chip Exit Command |
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\*_-------------------------------*/
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ChipExit();
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}
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void GigabyteSuperIORGBController::SetMode(int new_mode)
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{
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if(new_mode>=GIGABYTE_MODE1_STATIC && new_mode<=GIGABYTE_MODE1_FLASHING)
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{
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ChipEntry();
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}
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/*-----------------------------------------------------*\
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| Write the colors to the color sequence registers |
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\*-----------------------------------------------------*/
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switch (new_mode)
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{
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case GIGABYTE_MODE1_STATIC:
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_STATIC_REGISTER_1, GIGABYTE_SUPERIO_STATIC_VALUE_1);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_STATIC_REGISTER_2, GIGABYTE_SUPERIO_STATIC_VALUE_2);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_STATIC_REGISTER_3, GIGABYTE_SUPERIO_STATIC_VALUE_3);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_STATIC_REGISTER_4, GIGABYTE_SUPERIO_STATIC_VALUE_4);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_STATIC_REGISTER_5, GIGABYTE_SUPERIO_STATIC_VALUE_5);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_STATIC_REGISTER_6, GIGABYTE_SUPERIO_STATIC_VALUE_6);
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break;
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case GIGABYTE_MODE1_RAINBOW:
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RAINBOW_REGISTER_1, GIGABYTE_SUPERIO_RAINBOW_VALUE_1);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RAINBOW_REGISTER_2, GIGABYTE_SUPERIO_RAINBOW_VALUE_2);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RAINBOW_REGISTER_3, GIGABYTE_SUPERIO_RAINBOW_VALUE_3);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RAINBOW_REGISTER_4, GIGABYTE_SUPERIO_RAINBOW_VALUE_4);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RAINBOW_REGISTER_5, GIGABYTE_SUPERIO_RAINBOW_VALUE_5);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RAINBOW_REGISTER_6, GIGABYTE_SUPERIO_RAINBOW_VALUE_6);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RAINBOW_REGISTER_7, GIGABYTE_SUPERIO_RAINBOW_VALUE_7);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_RAINBOW_REGISTER_8, GIGABYTE_SUPERIO_RAINBOW_VALUE_8);
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break;
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case GIGABYTE_MODE1_BREATHING:
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_BREATHING_REGISTER_1, GIGABYTE_SUPERIO_BREATHING_VALUE_1);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_BREATHING_REGISTER_2, GIGABYTE_SUPERIO_BREATHING_VALUE_2);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_BREATHING_REGISTER_3, GIGABYTE_SUPERIO_BREATHING_VALUE_3);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_BREATHING_REGISTER_4, GIGABYTE_SUPERIO_BREATHING_VALUE_4);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_BREATHING_REGISTER_5, GIGABYTE_SUPERIO_BREATHING_VALUE_5);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_BREATHING_REGISTER_6, GIGABYTE_SUPERIO_BREATHING_VALUE_6);
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break;
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case GIGABYTE_MODE1_FLASHING:
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_FLASHING_REGISTER_1, GIGABYTE_SUPERIO_FLASHING_VALUE_1);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_FLASHING_REGISTER_2, GIGABYTE_SUPERIO_FLASHING_VALUE_2);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_FLASHING_REGISTER_3, GIGABYTE_SUPERIO_FLASHING_VALUE_3);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_FLASHING_REGISTER_4, GIGABYTE_SUPERIO_FLASHING_VALUE_4);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_FLASHING_REGISTER_5, GIGABYTE_SUPERIO_FLASHING_VALUE_5);
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superio_outb(gig_sioaddr, GIGABYTE_SUPERIO_FLASHING_REGISTER_6, GIGABYTE_SUPERIO_FLASHING_VALUE_6);
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break;
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}
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if(new_mode>=GIGABYTE_MODE1_STATIC && new_mode<=GIGABYTE_MODE1_FLASHING)
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{
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ChipExit();
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}
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}
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