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HyperX controller to use DIMM_DETECTOR

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This commit is contained in:
Milan Čermák 2024-12-23 07:26:58 +00:00 • committed by Adam Honse
parent 560ff5ab33
commit a2867e151d
5 changed files with 72 additions and 80 deletions
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57
Controllers/HyperXDRAMController/HyperXDRAMControllerDetect.cpp
View file

@ -63,50 +63,28 @@ bool TestForHyperXDRAMController(i2c_smbus_interface* bus, unsigned char address
* Detect HyperX DRAM controllers on the enumerated I2C busses. *
* *
* bus - pointer to i2c_smbus_interface where Aura device is connected *
* dev - I2C address of Aura device *
* slots - accessors to SPD information of the occupied slots *
* *
\******************************************************************************************/
void DetectHyperXDRAMControllers(std::vector<i2c_smbus_interface*> &busses)
void DetectHyperXDRAMControllers(i2c_smbus_interface* bus, std::vector<SPDWrapper*> &slots)
{
for(unsigned int bus = 0; bus < busses.size(); bus++)
{
unsigned char slots_valid = 0x00;
bool fury_detected = false;
bool pred_detected = false;
LOG_DEBUG("[%s] Checking VID/PID on bus %d...", HYPERX_CONTROLLER_NAME, bus);
IF_DRAM_SMBUS(busses[bus]->pci_vendor, busses[bus]->pci_device)
{
// Check for HyperX controller at 0x27
LOG_DEBUG("[%s] Testing bus %d at address 0x27", HYPERX_CONTROLLER_NAME, bus);
LOG_DEBUG("[%s] Testing bus %d at address 0x27", HYPERX_CONTROLLER_NAME, bus->port_id);
if(TestForHyperXDRAMController(busses[bus], 0x27))
if(TestForHyperXDRAMController(bus, 0x27))
{
// Switch to 2nd SPD page
busses[bus]->i2c_smbus_write_byte_data(0x37, 0x00, 0xFF);
std::this_thread::sleep_for(1ms);
for(int slot_addr = 0x50; slot_addr <= 0x57; slot_addr++)
{
// Test for HyperX SPD at slot_addr
// This test was copied from NGENUITY software
// Tests SPD addresses in order: 0x40, 0x41
int read_0x40 = busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x40);
int read_0x41 = busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x41);
LOG_DEBUG("[%s] SPD check: 0x40 => %02X, 0x41 => %02X, ",
HYPERX_CONTROLLER_NAME, read_0x40, read_0x41);
if((read_0x40 == 0x01) && (read_0x41 == 0x98))
for(SPDWrapper *slot : slots)
{
LOG_DEBUG("[%s] SPD check success", HYPERX_CONTROLLER_NAME);
slots_valid |= (1 << (slot_addr - 0x50));
slots_valid |= (1 << (slot->index()));
if(busses[bus]->i2c_smbus_read_byte_data(slot_addr, 0x67) == 0x01)
if(slot->manufacturer_data(0x06) == 0x01)
{
fury_detected = true;
}
@ -114,11 +92,6 @@ void DetectHyperXDRAMControllers(std::vector<i2c_smbus_interface*> &busses)
{
pred_detected = true;
}
}
else
{
LOG_DEBUG("[%s] SPD check failed", HYPERX_CONTROLLER_NAME);
}
std::this_thread::sleep_for(1ms);
}
@ -126,14 +99,9 @@ void DetectHyperXDRAMControllers(std::vector<i2c_smbus_interface*> &busses)
LOG_DEBUG("[%s] slots_valid=%d fury_detected=%d pred_detected=%d",
HYPERX_CONTROLLER_NAME, slots_valid, fury_detected, pred_detected);
// Switch back to 1st SPD page
busses[bus]->i2c_smbus_write_byte_data(0x36, 0x00, 0xFF);
std::this_thread::sleep_for(1ms);
if(slots_valid != 0)
{
HyperXDRAMController* controller = new HyperXDRAMController(busses[bus], 0x27, slots_valid);
HyperXDRAMController* controller = new HyperXDRAMController(bus, 0x27, slots_valid);
RGBController_HyperXDRAM* rgb_controller = new RGBController_HyperXDRAM(controller);
if(fury_detected && !pred_detected)
@ -148,13 +116,6 @@ void DetectHyperXDRAMControllers(std::vector<i2c_smbus_interface*> &busses)
ResourceManager::get()->RegisterRGBController(rgb_controller);
}
}
}
else
{
LOG_DEBUG("[%s] IF_DRAM_SMBUS was false for %04X %04X", HYPERX_CONTROLLER_NAME, busses[bus]->pci_vendor, busses[bus]->pci_device);
}
}
} /* DetectHyperXDRAMControllers() */
REGISTER_I2C_DETECTOR("HyperX DRAM", DetectHyperXDRAMControllers);
REGISTER_I2C_DIMM_DETECTOR("HyperX DRAM", DetectHyperXDRAMControllers, JEDEC_KINGSTON, SPD_DDR4_SDRAM);

18
SPDAccessor/SPDAccessor.cpp
View file

@ -111,6 +111,15 @@ uint16_t DDR4Accessor::jedec_id()
return((this->at(0x140) << 8) + (this->at(0x141) & 0x7f) - 1);
}
uint8_t DDR4Accessor::manufacturer_data(uint16_t index)
{
if(index > 28)
{
return 0;
}
return this->at(0x161 + index);
}
DDR5Accessor::DDR5Accessor(i2c_smbus_interface *bus, uint8_t spd_addr)
: SPDAccessor(bus, spd_addr)
{
@ -129,3 +138,12 @@ uint16_t DDR5Accessor::jedec_id()
{
return((this->at(0x200) << 8) + (this->at(0x201) & 0x7f) - 1);
}
uint8_t DDR5Accessor::manufacturer_data(uint16_t index)
{
if(index > 84)
{
return 0;
}
return this->at(0x22B + index);
}

3
SPDAccessor/SPDAccessor.h
View file

@ -21,6 +21,7 @@ class SPDAccessor
virtual SPDMemoryType memory_type() = 0;
virtual uint16_t jedec_id() = 0;
virtual uint8_t manufacturer_data(uint16_t index) = 0;
virtual SPDAccessor *copy() = 0;
@ -42,6 +43,7 @@ class DDR4Accessor : public SPDAccessor
virtual ~DDR4Accessor();
virtual SPDMemoryType memory_type();
virtual uint16_t jedec_id();
virtual uint8_t manufacturer_data(uint16_t index);
};
class DDR5Accessor : public SPDAccessor
@ -51,4 +53,5 @@ class DDR5Accessor : public SPDAccessor
virtual ~DDR5Accessor();
virtual SPDMemoryType memory_type();
virtual uint16_t jedec_id();
virtual uint8_t manufacturer_data(uint16_t index);
};

9
SPDAccessor/SPDWrapper.cpp
View file

@ -52,6 +52,15 @@ uint16_t SPDWrapper::jedec_id()
return accessor->jedec_id();
}
uint8_t SPDWrapper::manufacturer_data(uint16_t index)
{
if(accessor == nullptr)
{
return 0x00;
}
return accessor->manufacturer_data(index);
}
/*-------------------------------------------------------------------------*\
| Helper functions for easier collection handling. |
\*-------------------------------------------------------------------------*/

1
SPDAccessor/SPDWrapper.h
View file

@ -23,6 +23,7 @@ class SPDWrapper
SPDMemoryType memory_type();
int index();
uint16_t jedec_id();
uint8_t manufacturer_data(uint16_t index);
private:
SPDAccessor *accessor = nullptr;