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i801 working on Gigabyte X58-UD3R at 0x0500

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This commit is contained in:
Adam Honse 2019-01-30 23:44:48 -06:00
parent 006289c784
commit 6e9cf5e751
5 changed files with 14 additions and 8 deletions
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OpenAuraSDK/OpenAuraSDK.cpp
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1
OpenAuraSDK/OpenAuraSDK.vcxproj
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@ -170,7 +170,6 @@
<ClInclude Include="i2c_smbus_i801.h" />
<ClInclude Include="i2c_smbus_piix4.h" />
<ClInclude Include="OpenAuraSDK.h" />
<ClInclude Include="targetver.h" />
</ItemGroup>
<ItemGroup>
<ClCompile Include="AuraController.cpp" />

3
OpenAuraSDK/OpenAuraSDK.vcxproj.filters
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@ -15,9 +15,6 @@
</Filter>
</ItemGroup>
<ItemGroup>
<ClInclude Include="targetver.h">
<Filter>Header Files</Filter>
</ClInclude>
<ClInclude Include="i2c_smbus.h">
<Filter>Header Files</Filter>
</ClInclude>

9
OpenAuraSDK/i2c_smbus_i801.cpp
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@ -93,8 +93,7 @@ s32 i2c_smbus_i801::i801_access(u16 addr, char read_write, u8 command, int size,
//if (hwpec) /* enable/disable hardware PEC */
// outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
//else
// outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
// SMBAUXCTL(priv));
Out32(SMBAUXCTL, Inp32(SMBAUXCTL) & (~SMBAUXCTL_CRC));
if (block)
ret = i801_block_transaction(data, read_write, size, hwpec);
@ -105,8 +104,7 @@ s32 i2c_smbus_i801::i801_access(u16 addr, char read_write, u8 command, int size,
time, so we forcibly disable it after every transaction. Turn off
E32B for the same reason. */
//if (hwpec || block)
// outb_p(inb_p(SMBAUXCTL(priv)) &
// ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
Out32(SMBAUXCTL, Inp32(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B));
if (block)
goto out;
@ -299,6 +297,7 @@ int i2c_smbus_i801::i801_check_post(int status)
/* try to stop the current command */
Out32(SMBHSTCNT, Inp32(SMBHSTCNT) | SMBHSTCNT_KILL);
//usleep_range(1000, 2000);
Sleep(1);
Out32(SMBHSTCNT, Inp32(SMBHSTCNT) & (~SMBHSTCNT_KILL));
Out32(SMBHSTSTS, STATUS_FLAGS);
@ -408,6 +407,7 @@ int i2c_smbus_i801::i801_transaction(int xact)
if (result < 0)
return result;
Out32(SMBHSTCNT, Inp32(SMBHSTCNT) & ~SMBHSTCNT_INTREN);
//if (priv->features & FEATURE_IRQ)
//{
// outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START,
@ -441,6 +441,7 @@ int i2c_smbus_i801::i801_wait_byte_done()
/* We will always wait for a fraction of a second! */
do
{
Sleep(1);
//usleep_range(250, 500);
status = Inp32(SMBHSTSTS);
} while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) && (timeout++ < MAX_RETRIES));

9
OpenAuraSDK/i2c_smbus_i801.h
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@ -30,6 +30,15 @@
#define SMBSLVCMD (17 + i801_smba) /* ICH3 and later */
#define SMBNTFDADD (20 + i801_smba) /* ICH3 and later */
/* Auxiliary status register bits, ICH4+ only */
#define SMBAUXSTS_CRCE BIT(0)
#define SMBAUXSTS_STCO BIT(1)
/* Auxiliary control register bits, ICH4+ only */
#define SMBAUXCTL_CRC BIT(0)
#define SMBAUXCTL_E32B BIT(1)
/* Other settings */
#define MAX_RETRIES 400