AMD ADL SMBus improvements
* Allow word (2 byte) transfers * Fix block writes not sending data size
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f4f97c61ea
commit
6341d629d8
1 changed files with 23 additions and 5 deletions
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@ -128,16 +128,20 @@ s32 i2c_smbus_amdadl::i2c_smbus_xfer(u8 addr, char read_write, u8 command, int s
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{
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int PrimaryDisplay;
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int ret;
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int data_size = 0;
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char* data_ptr;
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ADLI2C* pI2C;
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ADLI2C I2Cstore;
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pI2C = &I2Cstore;
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char i2c_buf[I2C_SMBUS_BLOCK_MAX + 8];
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pI2C->iSize = sizeof(ADLI2C);
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pI2C->iSpeed = 100;
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pI2C->iLine = 1; //location of the Aura chip
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pI2C->iAddress = addr << 1;
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pI2C->iOffset = command;
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pI2C->iOffset = 0;
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pI2C->pcData = (char*)data;
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if (ADL_OK != ADL2_Adapter_Primary_Get(context, &PrimaryDisplay))
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@ -159,16 +163,18 @@ s32 i2c_smbus_amdadl::i2c_smbus_xfer(u8 addr, char read_write, u8 command, int s
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//break;
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case I2C_SMBUS_BYTE_DATA:
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pI2C->iDataSize = 1;
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data_size = 1;
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data_ptr = (char*)data;
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break;
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case I2C_SMBUS_WORD_DATA:
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return -1;
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data_size = 2;
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data_ptr = (char*)data;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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pI2C->iDataSize = data->block[0];
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pI2C->pcData = (char*)&data->block[1];
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data_size = data->block[0] + 1;
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data_ptr = (char*)&data->block[0];
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break;
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default:
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@ -177,12 +183,24 @@ s32 i2c_smbus_amdadl::i2c_smbus_xfer(u8 addr, char read_write, u8 command, int s
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if (read_write == I2C_SMBUS_READ)
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{
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/* An SMBus read can be achieved by setting the offset to the command (register address) */
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pI2C->iOffset = command;
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pI2C->iAction = ADL_DL_I2C_ACTIONREAD;
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pI2C->iDataSize = data_size;
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pI2C->pcData = (char *)data_ptr;
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ret = ADL2_Display_WriteAndReadI2C(context, PrimaryDisplay, pI2C);
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}
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else
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{
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/* An SMBus write has one extra byte, the register address, before the data */
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pI2C->iAction = ADL_DL_I2C_ACTIONWRITE;
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pI2C->iDataSize = data_size + 1;
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pI2C->pcData = i2c_buf;
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i2c_buf[0] = command;
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memcpy(&i2c_buf[1], data_ptr, data_size);
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ret = ADL2_Display_WriteAndReadI2C(context, PrimaryDisplay, pI2C);
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}
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