Update Gigabyte Blackwell controller and adds several GPUs

This commit is contained in:
Paulo 2025-05-27 20:23:36 +00:00 committed by Adam Honse
parent ac1503d246
commit 3e7ad705bb
5 changed files with 98 additions and 48 deletions

View file

@ -42,21 +42,21 @@ void RGBFusion2BlackwellGPUController::SaveConfig()
bus->i2c_write_block(dev, sizeof(data_pkt), data_pkt); bus->i2c_write_block(dev, sizeof(data_pkt), data_pkt);
} }
void RGBFusion2BlackwellGPUController::SetMode(uint8_t zone, uint8_t mode, fusion2_config zone_config) void RGBFusion2BlackwellGPUController::SetMode(uint8_t type, uint8_t zone, uint8_t mode, fusion2_config zone_config)
{ {
if(zone < RGB_FUSION_2_BLACKWELL_GPU_NUMBER_OF_ZONES) if(zone_config.numberOfColors == 0 && zone < RGB_FUSION_2_BLACKWELL_GPU_NUMBER_OF_ZONES)
this->zone_color[zone] = zone_config.colors[0]; this->zone_color[zone] = zone_config.colors[zone];
/************************************************************************************\ /************************************************************************************\
* * * *
* Packet (total size = 64 bytes) * * Packet (total size = 64 bytes) *
* MODE SPD BRT R G B 0 ZONE SZ0-8 * * TYPE MODE SPD BRT R G B 0 ZONE SZ0-8 *
* 0x12 0x01 0x08 0x06 0x0A 0xFF 0xFF 0x00 0x00 0x00 0x08 [R] [G] [B] [R] [G] [B] ... * * 0x12 0x01 0x08 0x06 0x0A 0xFF 0xFF 0x00 0x00 0x00 0x08 [R] [G] [B] [R] [G] [B] ... *
* * * *
* SZ is the amount of colors that will be sent in the format of 3 bytes RGB * * SZ is the amount of colors that will be sent in the format of 3 bytes RGB *
* * * *
\************************************************************************************/ \************************************************************************************/
uint8_t zone_pkt[64] = {RGB_FUSION2_BLACKWELL_GPU_REG_COLOR, 0x01, mode, zone_config.speed, zone_config.brightness, RGBGetRValue(this->zone_color[zone]), RGBGetGValue(this->zone_color[zone]), RGBGetBValue(this->zone_color[zone]), 0x00, zone, zone_config.numberOfColors, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; uint8_t zone_pkt[64] = {type, 0x01, mode, zone_config.speed, zone_config.brightness, RGBGetRValue(this->zone_color[zone]), RGBGetGValue(this->zone_color[zone]), RGBGetBValue(this->zone_color[zone]), 0x00, zone, zone_config.numberOfColors, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
if(zone_config.numberOfColors > 0) if(zone_config.numberOfColors > 0)
{ {
@ -78,5 +78,9 @@ void RGBFusion2BlackwellGPUController::SetZone(uint8_t zone, uint8_t mode, fusio
if(mode == RGB_FUSION2_BLACKWELL_GPU_MODE_BREATHING) if(mode == RGB_FUSION2_BLACKWELL_GPU_MODE_BREATHING)
zone_config.brightness = RGB_FUSION2_BLACKWELL_GPU_BRIGHTNESS_MAX; zone_config.brightness = RGB_FUSION2_BLACKWELL_GPU_BRIGHTNESS_MAX;
SetMode(zone, mode, zone_config); uint8_t type = RGB_FUSION2_BLACKWELL_GPU_REG_COLOR;
if(mode != RGB_FUSION2_BLACKWELL_GPU_MODE_STATIC)
type = RGB_FUSION2_BLACKWELL_GPU_REG_MODE;
SetMode(type, zone, mode, zone_config);
} }

View file

@ -27,8 +27,8 @@ struct fusion2_config
enum enum
{ {
RGB_FUSION2_BLACKWELL_GPU_REG_COLOR = 0x12, RGB_FUSION2_BLACKWELL_GPU_REG_MODE = 0x12, // Limits updates to at most 9 per second, required for all modes but static/direct
RGB_FUSION2_BLACKWELL_GPU_REG_MODE = 0x16 // Used for 'Intelligent' mode RGB_FUSION2_BLACKWELL_GPU_REG_COLOR = 0x16, // Used for 'Intelligent' mode, faster updates (used for direct mode)
}; };
enum enum
@ -38,10 +38,11 @@ enum
RGB_FUSION2_BLACKWELL_GPU_MODE_FLASHING = 0x03, RGB_FUSION2_BLACKWELL_GPU_MODE_FLASHING = 0x03,
RGB_FUSION2_BLACKWELL_GPU_MODE_DUAL_FLASHING = 0x04, RGB_FUSION2_BLACKWELL_GPU_MODE_DUAL_FLASHING = 0x04,
RGB_FUSION2_BLACKWELL_GPU_MODE_COLOR_CYCLE = 0x05, RGB_FUSION2_BLACKWELL_GPU_MODE_COLOR_CYCLE = 0x05,
RGB_FUSION2_BLACKWELL_GPU_MODE_WAVE = 0x06, //not available to Eagle/Aero RGB_FUSION2_BLACKWELL_GPU_MODE_WAVE = 0x06, // Not available to Eagle/Aero
RGB_FUSION2_BLACKWELL_GPU_MODE_GRADIENT = 0x07, //not available to Eagle/Aero RGB_FUSION2_BLACKWELL_GPU_MODE_GRADIENT = 0x07, // Not available to Eagle/Aero
RGB_FUSION2_BLACKWELL_GPU_MODE_COLOR_SHIFT = 0x08, //not available to Eagle/Aero RGB_FUSION2_BLACKWELL_GPU_MODE_COLOR_SHIFT = 0x08, // Not available to Eagle/Aero
RGB_FUSION2_BLACKWELL_GPU_MODE_DAZZLE = 0x0A, //not available to Eagle/Aero RGB_FUSION2_BLACKWELL_GPU_MODE_TRICOLOR = 0x09, // Available to Waterforce
RGB_FUSION2_BLACKWELL_GPU_MODE_DAZZLE = 0x0A, // Not available to Eagle/Aero/Waterforce
}; };
enum enum
@ -61,6 +62,7 @@ enum
{ {
RGB_FUSION2_BLACKWELL_GPU_SINGLE_ZONE = 0, RGB_FUSION2_BLACKWELL_GPU_SINGLE_ZONE = 0,
RGB_FUSION2_BLACKWELL_GPU_GAMING_LAYOUT = 1, RGB_FUSION2_BLACKWELL_GPU_GAMING_LAYOUT = 1,
RGB_FUSION2_BLACKWELL_GPU_WATERFORCE_LAYOUT = 2,
}; };
class RGBFusion2BlackwellGPUController class RGBFusion2BlackwellGPUController
@ -75,7 +77,7 @@ public:
void SaveConfig(); void SaveConfig();
void SetZone(uint8_t zone, uint8_t mode, fusion2_config zone_config); void SetZone(uint8_t zone, uint8_t mode, fusion2_config zone_config);
void SetMode(uint8_t zone, uint8_t mode, fusion2_config zone_config); void SetMode(uint8_t type, uint8_t zone, uint8_t mode, fusion2_config zone_config);
private: private:
i2c_smbus_interface* bus; i2c_smbus_interface* bus;
rgb_fusion_dev_id dev; rgb_fusion_dev_id dev;

View file

@ -89,7 +89,7 @@ void DetectGigabyteRGBFusion2BlackwellGPUControllers(i2c_smbus_interface* bus, u
ResourceManager::get()->RegisterRGBController(rgb_controller); ResourceManager::get()->RegisterRGBController(rgb_controller);
} }
} /* DetectGigabyteRGBFusion2BlackwellMultiZoneGPUControllers() */ } /* DetectGigabyteRGBFusion2BlackwellGPUControllers() */
/*******************************************************************************************\ /*******************************************************************************************\
* * * *
@ -122,19 +122,40 @@ void DetectGigabyteRGBFusion2BlackwellSingleZoneGPUControllers(i2c_smbus_interfa
void DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers(i2c_smbus_interface* bus, uint8_t i2c_addr, const std::string& name) void DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers(i2c_smbus_interface* bus, uint8_t i2c_addr, const std::string& name)
{ {
DetectGigabyteRGBFusion2BlackwellGPUControllers(bus, i2c_addr, name, RGB_FUSION2_BLACKWELL_GPU_GAMING_LAYOUT); DetectGigabyteRGBFusion2BlackwellGPUControllers(bus, i2c_addr, name, RGB_FUSION2_BLACKWELL_GPU_GAMING_LAYOUT);
} /* DetectGigabyteRGBFusion2BlackwellMultiZoneGPUControllers() */ } /* DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers() */
/*******************************************************************************************\
* *
* DetectGigabyteRGBFusion2BlackwellWaterforceLayoutGPUControllers *
* *
* Detect GigabyteRGB Fusion2 controllers with waterforce layouts on the enumerated *
* I2C busses. *
* *
* bus - pointer to i2c_smbus_interface where RGB Fusion2 device is connected *
* dev - I2C address of RGB Fusion2 device *
* *
\*******************************************************************************************/
void DetectGigabyteRGBFusion2BlackwellWaterforceLayoutGPUControllers(i2c_smbus_interface* bus, uint8_t i2c_addr, const std::string& name)
{
DetectGigabyteRGBFusion2BlackwellGPUControllers(bus, i2c_addr, name, RGB_FUSION2_BLACKWELL_GPU_WATERFORCE_LAYOUT);
} /* DetectGigabyteRGBFusion2BlackwellWaterforceLayoutGPUControllers() */
/*-----------------------------------------*\ /*-----------------------------------------*\
| Nvidia GPUs | | Nvidia GPUs |
\*-----------------------------------------*/ \*-----------------------------------------*/
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Gaming OC", DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070_GAMING_OC_16G_SUB_DEV, 0x75); REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5060 Ti Gaming OC", DetectGigabyteRGBFusion2BlackwellSingleZoneGPUControllers, NVIDIA_VEN, NVIDIA_RTX5060TI_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5060TI_GAMING_OC_16G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Ti Eagle OC", DetectGigabyteRGBFusion2BlackwellSingleZoneGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070TI_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070TI_EAGLE_OC_16G_SUB_DEV, 0x75); REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Eagle OC", DetectGigabyteRGBFusion2BlackwellSingleZoneGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070_EAGLE_OC_12G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Ti Eagle OC ICE", DetectGigabyteRGBFusion2BlackwellSingleZoneGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070TI_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070TI_EAGLE_OC_ICE_16G_SUB_DEV, 0x75); REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Gaming OC", DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070_GAMING_OC_12G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Ti Aero OC", DetectGigabyteRGBFusion2BlackwellSingleZoneGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070TI_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070TI_AERO_OC_16G_SUB_DEV, 0x75); REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Ti Eagle OC", DetectGigabyteRGBFusion2BlackwellSingleZoneGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070TI_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070TI_EAGLE_OC_16G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Ti Gaming OC", DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070TI_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070TI_GAMING_OC_16G_SUB_DEV, 0x75); REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Ti Eagle OC ICE", DetectGigabyteRGBFusion2BlackwellSingleZoneGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070TI_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070TI_EAGLE_OC_ICE_16G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5080 Gaming OC", DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5080_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5080_GAMING_OC_16G_SUB_DEV, 0x75); REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Ti Aero OC", DetectGigabyteRGBFusion2BlackwellSingleZoneGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070TI_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070TI_AERO_OC_16G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5090 Gaming OC", DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5090_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5090_GAMING_OC_32G_SUB_DEV, 0x75); REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5070 Ti Gaming OC", DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5070TI_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5070TI_GAMING_OC_16G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5080 Gaming OC", DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5080_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5080_GAMING_OC_16G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5080 Xtreme Waterforce", DetectGigabyteRGBFusion2BlackwellWaterforceLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5080_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5080_XTREME_WATERFORCE_16G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5090 Gaming OC", DetectGigabyteRGBFusion2BlackwellGamingLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5090_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5090_GAMING_OC_32G_SUB_DEV, 0x75);
REGISTER_I2C_PCI_DETECTOR("Gigabyte GeForce RTX 5090 Xtreme Waterforce", DetectGigabyteRGBFusion2BlackwellWaterforceLayoutGPUControllers, NVIDIA_VEN, NVIDIA_RTX5090_DEV, GIGABYTE_SUB_VEN, GIGABYTE_RTX5090_XTREME_WATERFORCE_32G_SUB_DEV, 0x75);
/*-----------------------------------------*\ /*-----------------------------------------*\
| AMD GPUs | | AMD GPUs |

View file

@ -97,7 +97,7 @@ RGBController_RGBFusion2BlackwellGPU::RGBController_RGBFusion2BlackwellGPU(RGBFu
SpectrumCycle.brightness = RGB_FUSION2_BLACKWELL_GPU_BRIGHTNESS_MAX; SpectrumCycle.brightness = RGB_FUSION2_BLACKWELL_GPU_BRIGHTNESS_MAX;
modes.push_back(SpectrumCycle); modes.push_back(SpectrumCycle);
if(led_layout == RGB_FUSION2_BLACKWELL_GPU_GAMING_LAYOUT) if(led_layout == RGB_FUSION2_BLACKWELL_GPU_GAMING_LAYOUT || led_layout == RGB_FUSION2_BLACKWELL_GPU_WATERFORCE_LAYOUT)
{ {
mode Wave; mode Wave;
Wave.name = "Wave"; Wave.name = "Wave";
@ -142,7 +142,7 @@ RGBController_RGBFusion2BlackwellGPU::RGBController_RGBFusion2BlackwellGPU(RGBFu
modes.push_back(ColorShift); modes.push_back(ColorShift);
/* Disabled Dazzle as it seems to only execute once, would need to loop it maybe? /* Disabled Dazzle as it seems to only execute once, would need to loop it maybe?
* * Not for Waterforce
mode Dazzle; mode Dazzle;
Dazzle.name = "Dazzle"; Dazzle.name = "Dazzle";
Dazzle.value = RGB_FUSION2_BLACKWELL_GPU_MODE_DAZZLE; Dazzle.value = RGB_FUSION2_BLACKWELL_GPU_MODE_DAZZLE;
@ -222,6 +222,32 @@ void RGBController_RGBFusion2BlackwellGPU::SetupZones()
zones.push_back(new_zone); zones.push_back(new_zone);
} }
} }
else if(gpu_layout == RGB_FUSION2_BLACKWELL_GPU_WATERFORCE_LAYOUT)
{
for(uint8_t zone_idx = 0; zone_idx < 2; zone_idx++)
{
zone new_zone;
led new_led;
switch(zone_idx)
{
case 0: new_zone.name = "Waterblock"; break;
case 1: new_zone.name = "Backplate"; break;
}
new_zone.type = ZONE_TYPE_SINGLE;
new_zone.leds_min = 1;
new_zone.leds_max = 1;
new_zone.leds_count = 1;
new_zone.matrix_map = NULL;
new_led.name = new_zone.name;
/*---------------------------------------------------------*\
| Push the zone and LED on to device vectors |
\*---------------------------------------------------------*/
leds.push_back(new_led);
zones.push_back(new_zone);
}
}
SetupColors(); SetupColors();
} }
@ -244,34 +270,26 @@ void RGBController_RGBFusion2BlackwellGPU::DeviceUpdateLEDs()
if(modes[active_mode].color_mode == MODE_COLORS_MODE_SPECIFIC) if(modes[active_mode].color_mode == MODE_COLORS_MODE_SPECIFIC)
zone_config.numberOfColors = (uint8_t)modes[active_mode].colors.size(); zone_config.numberOfColors = (uint8_t)modes[active_mode].colors.size();
if(zones.size() == 1) uint8_t gpu_zones;
switch(gpu_layout) // replicating GCC that sends more packets even when there is less zones
{ {
zone_config.colors[0] = colors[0]; case RGB_FUSION2_BLACKWELL_GPU_SINGLE_ZONE: gpu_zones = 1; break;
case RGB_FUSION2_BLACKWELL_GPU_GAMING_LAYOUT: gpu_zones = 6; break;
for(uint8_t i = 0; i < zone_config.numberOfColors; i++) case RGB_FUSION2_BLACKWELL_GPU_WATERFORCE_LAYOUT: gpu_zones = 3; break;
{ default: LOG_TRACE("[%s] Invalid GPU layout (%d) when updating LEDs.", name.c_str(), gpu_layout); return; // should not happen
zone_config.colors[i] = modes[active_mode].colors[i];
}
controller->SetZone(0, modes[active_mode].value, zone_config);
} }
else
for(uint8_t zone_idx = 0; zone_idx < gpu_zones; zone_idx++)
{ {
// replicating GCC that sends up to 0x05 even when there is less zones if(zone_idx >= zones.size())
for(uint8_t zone_idx = 0; zone_idx < RGB_FUSION_2_BLACKWELL_GPU_NUMBER_OF_ZONES; zone_idx++) zone_config.colors[zone_idx] = colors.back();
{ else
if(zone_idx >= zones.size()) zone_config.colors[zone_idx] = colors[zone_idx];
zone_config.colors[0] = colors.back();
else
zone_config.colors[0] = colors[zone_idx];
for(uint8_t i = 0; i < zone_config.numberOfColors; i++) for(uint8_t i = 0; i < zone_config.numberOfColors; i++) // specific for MODE_COLORS_MODE_SPECIFIC
{ zone_config.colors[i] = modes[active_mode].colors[i];
zone_config.colors[i] = modes[active_mode].colors[i];
}
controller->SetZone(zone_idx, modes[active_mode].value, zone_config); controller->SetZone(zone_idx, modes[active_mode].value, zone_config);
}
} }
} }

View file

@ -119,6 +119,7 @@
#define NVIDIA_RTX4080_DEV 0x2704 #define NVIDIA_RTX4080_DEV 0x2704
#define NVIDIA_RTX4080S_DEV 0x2702 #define NVIDIA_RTX4080S_DEV 0x2702
#define NVIDIA_RTX4090_DEV 0x2684 #define NVIDIA_RTX4090_DEV 0x2684
#define NVIDIA_RTX5060TI_DEV 0x2D04
#define NVIDIA_RTX5070_DEV 0x2F04 #define NVIDIA_RTX5070_DEV 0x2F04
#define NVIDIA_RTX5070TI_DEV 0x2C05 #define NVIDIA_RTX5070TI_DEV 0x2C05
#define NVIDIA_RTX5080_DEV 0x2C02 #define NVIDIA_RTX5080_DEV 0x2C02
@ -675,16 +676,20 @@
#define GIGABYTE_RTX4090_GAMING_OC_24G_SUB_DEV 0x40BF #define GIGABYTE_RTX4090_GAMING_OC_24G_SUB_DEV 0x40BF
#define GIGABYTE_AORUS_RTX4090_MASTER_24G_SUB_DEV 0x40C0 #define GIGABYTE_AORUS_RTX4090_MASTER_24G_SUB_DEV 0x40C0
#define GIGABYTE_RX7800XT_GAMING_OC_16G_SUB_DEV 0x2413 #define GIGABYTE_RX7800XT_GAMING_OC_16G_SUB_DEV 0x2413
#define GIGABYTE_RTX5070_GAMING_OC_16G_SUB_DEV 0x4174 #define GIGABYTE_RTX5060TI_GAMING_OC_16G_SUB_DEV 0x4191
#define GIGABYTE_RTX5070_EAGLE_OC_12G_SUB_DEV 0x417D
#define GIGABYTE_RTX5070_GAMING_OC_12G_SUB_DEV 0x4174
#define GIGABYTE_RTX5070TI_EAGLE_OC_16G_SUB_DEV 0x4180 #define GIGABYTE_RTX5070TI_EAGLE_OC_16G_SUB_DEV 0x4180
#define GIGABYTE_RTX5070TI_EAGLE_OC_ICE_16G_SUB_DEV 0x4182 #define GIGABYTE_RTX5070TI_EAGLE_OC_ICE_16G_SUB_DEV 0x4182
#define GIGABYTE_RTX5070TI_AERO_OC_16G_SUB_DEV 0x417F #define GIGABYTE_RTX5070TI_AERO_OC_16G_SUB_DEV 0x417F
#define GIGABYTE_RTX5070TI_GAMING_OC_16G_SUB_DEV 0x4181 #define GIGABYTE_RTX5070TI_GAMING_OC_16G_SUB_DEV 0x4181
#define GIGABYTE_RTX5080_GAMING_OC_16G_SUB_DEV 0x4176 #define GIGABYTE_RTX5080_GAMING_OC_16G_SUB_DEV 0x4176
#define GIGABYTE_RTX5080_XTREME_WATERFORCE_16G_SUB_DEV 0x418B
#define GIGABYTE_RTX5090_GAMING_OC_32G_SUB_DEV 0x416F #define GIGABYTE_RTX5090_GAMING_OC_32G_SUB_DEV 0x416F
#define GIGABYTE_AORUS_RTX5090_MASTER_32G_SUB_DEV 0x416E #define GIGABYTE_AORUS_RTX5090_MASTER_32G_SUB_DEV 0x416E
#define GIGABYTE_AORUS_RTX5090_MASTER_ICE_32G_SUB_DEV 0x4199 #define GIGABYTE_AORUS_RTX5090_MASTER_ICE_32G_SUB_DEV 0x4199
#define GIGABYTE_AORUS_RTX5090D_MASTER_32G_SUB_DEV 0x4188 #define GIGABYTE_AORUS_RTX5090D_MASTER_32G_SUB_DEV 0x4188
#define GIGABYTE_RTX5090_XTREME_WATERFORCE_32G_SUB_DEV 0x4172
#define GIGABYTE_AORUS_RX_6750_XT_ELITE_12G_SUB_DEV 0x2407 #define GIGABYTE_AORUS_RX_6750_XT_ELITE_12G_SUB_DEV 0x2407
/*-----------------------------------------------------*\ /*-----------------------------------------------------*\