From 34cb864147a032c189d2cbae28e94b538a49c094 Mon Sep 17 00:00:00 2001
From: Chris M <galdarian@gmail.com>
Date: Fri, 2 Dec 2022 07:17:13 +1100
Subject: [PATCH] Adding New Fusion2 USB board layout to resolve #2923

* Adding MSTR_ATX_2 layout to support the new layout of the X670E AORUS
Master
---
 .../RGBController_GigabyteRGBFusion2USB.cpp   | 46 +++++++++++++++----
 1 file changed, 37 insertions(+), 9 deletions(-)

diff --git a/Controllers/GigabyteRGBFusion2USBController/RGBController_GigabyteRGBFusion2USB.cpp b/Controllers/GigabyteRGBFusion2USBController/RGBController_GigabyteRGBFusion2USB.cpp
index 7fdd988a..da2bbdc0 100644
--- a/Controllers/GigabyteRGBFusion2USBController/RGBController_GigabyteRGBFusion2USB.cpp
+++ b/Controllers/GigabyteRGBFusion2USBController/RGBController_GigabyteRGBFusion2USB.cpp
@@ -30,15 +30,16 @@ static FwdLedHeaders LedLookup
 \*-------------------------------------------------*/
 static MBName MBName2LayoutLookup
 {
-    {"B550 AORUS ELITE",        "STD_ATX"},
-    {"B550 AORUS PRO",          "STD_ATX"},
-    {"B550I AORUS PRO AX",      "ITX"},
-    {"X570 AORUS ELITE",        "STD_ATX"},
-    {"X570 AORUS ELITE WIFI",   "STD_ATX"},
-    {"X570 AORUS PRO WIFI",     "STD_ATX"},
-    {"X570 AORUS ULTRA",        "STD_ATX"},
-    {"X570 I AORUS PRO WIFI",   "ITX"},
-    {"Z390 AORUS MASTER-CF",    "MSTR_ATX"}
+    {"B550 AORUS ELITE",            "STD_ATX"   },
+    {"B550 AORUS PRO",              "STD_ATX"   },
+    {"B550I AORUS PRO AX",          "ITX"       },
+    {"X570 AORUS ELITE",            "STD_ATX"   },
+    {"X570 AORUS ELITE WIFI",       "STD_ATX"   },
+    {"X570 AORUS PRO WIFI",         "STD_ATX"   },
+    {"X570 AORUS ULTRA",            "STD_ATX"   },
+    {"X570 I AORUS PRO WIFI",       "ITX"       },
+    {"X670E AORUS MASTER",          "MSTR_ATX_2"},
+    {"Z390 AORUS MASTER-CF",        "MSTR_ATX"  },
 };
 
 /*-------------------------------------------------*\
@@ -186,6 +187,33 @@ static KnownLayout knownLayoutsLookup
             }
         }
     },
+    {
+        "MSTR_ATX_2",
+        {
+            {
+                "D_LED1 Bottom",
+                {
+                    { "D_LED1 Bottom", HDR_D_LED2, 0},
+                }
+            },
+            {
+                "D_LED2 Top",
+                {
+                    { "D_LED2 Top",  HDR_D_LED1, 0},
+                }
+            },
+            {
+                "Motherboard",
+                {
+                    { "LED C1",         LED2, 1},
+                    { "LED C2",         LED5, 1},
+                    { "CPU Header",     LED3, 1},
+                    { "Cover Left",     LED4, 1},
+                    { "Cover Right",    LED1, 1},
+                }
+            }
+        }
+    },
 };
 
 /**------------------------------------------------------------------*\